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Document i2c Device Tree support for RZ/G1[ME] (also known as r8a774[35]) SoCs. They are compatible with R-Car Gen2 SoC family. No driver change is required as the initialisation sequence is currently the same as for the R-Car Gen2 fallback binding. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Acked-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
57 lines
1.8 KiB
Plaintext
57 lines
1.8 KiB
Plaintext
Device tree configuration for Renesas IIC (sh_mobile) driver
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Required properties:
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- compatible :
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- "renesas,iic-r8a73a4" (R-Mobile APE6)
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- "renesas,iic-r8a7740" (R-Mobile A1)
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- "renesas,iic-r8a7743" (RZ/G1M)
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- "renesas,iic-r8a7745" (RZ/G1E)
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- "renesas,iic-r8a7790" (R-Car H2)
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- "renesas,iic-r8a7791" (R-Car M2-W)
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- "renesas,iic-r8a7792" (R-Car V2H)
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- "renesas,iic-r8a7793" (R-Car M2-N)
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- "renesas,iic-r8a7794" (R-Car E2)
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- "renesas,iic-r8a7795" (R-Car H3)
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- "renesas,iic-r8a7796" (R-Car M3-W)
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- "renesas,iic-sh73a0" (SH-Mobile AG5)
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- "renesas,rcar-gen2-iic" (generic R-Car Gen2 or RZ/G1
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compatible device)
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- "renesas,rcar-gen3-iic" (generic R-Car Gen3 compatible device)
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- "renesas,rmobile-iic" (generic device)
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When compatible with a generic R-Car version, nodes
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must list the SoC-specific version corresponding to
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the platform first followed by the generic R-Car
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version.
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renesas,rmobile-iic must always follow.
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- reg : address start and address range size of device
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- interrupts : interrupt of device
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- clocks : clock for device
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- #address-cells : should be <1>
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- #size-cells : should be <0>
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Optional properties:
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- clock-frequency : frequency of bus clock in Hz. Default 100kHz if unset.
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- dmas : Must contain a list of two references to DMA
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specifiers, one for transmission, and one for
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reception.
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- dma-names : Must contain a list of two DMA names, "tx" and "rx".
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Pinctrl properties might be needed, too. See there.
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Example:
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iic0: i2c@e6500000 {
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compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
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"renesas,rmobile-iic";
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reg = <0 0xe6500000 0 0x425>;
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interrupts = <0 174 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks R8A7790_CLK_IIC0>;
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clock-frequency = <400000>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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