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338d915090
Move assembly source prototypes from xtensa_ksyms.c to asm/asm-prototypes.h, move corresponding EXPORT_SYMBOLs to the assembly sources and enable HAVE_ASM_MODVERSIONS for xtensa. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
89 lines
2.5 KiB
ArmAsm
89 lines
2.5 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-or-later WITH GCC-exception-2.0 */
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#include <linux/linkage.h>
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#include <asm/asmmacro.h>
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#include <asm/core.h>
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ENTRY(__modsi3)
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abi_entry_default
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#if XCHAL_HAVE_DIV32
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rems a2, a2, a3
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#else
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mov a7, a2 /* save original (signed) dividend */
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do_abs a2, a2, a4 /* udividend = abs (dividend) */
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do_abs a3, a3, a4 /* udivisor = abs (divisor) */
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bltui a3, 2, .Lle_one /* check if udivisor <= 1 */
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do_nsau a5, a2, a6, a8 /* udividend_shift = nsau (udividend) */
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do_nsau a4, a3, a6, a8 /* udivisor_shift = nsau (udivisor) */
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bgeu a5, a4, .Lspecial
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sub a4, a4, a5 /* count = udivisor_shift - udividend_shift */
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ssl a4
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sll a3, a3 /* udivisor <<= count */
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/* test-subtract-and-shift loop */
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#if XCHAL_HAVE_LOOPS
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loopnez a4, .Lloopend
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#endif /* XCHAL_HAVE_LOOPS */
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.Lloop:
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bltu a2, a3, .Lzerobit
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sub a2, a2, a3
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.Lzerobit:
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srli a3, a3, 1
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#if !XCHAL_HAVE_LOOPS
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addi a4, a4, -1
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bnez a4, .Lloop
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#endif /* !XCHAL_HAVE_LOOPS */
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.Lloopend:
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.Lspecial:
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bltu a2, a3, .Lreturn
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sub a2, a2, a3 /* subtract again if udividend >= udivisor */
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.Lreturn:
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bgez a7, .Lpositive
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neg a2, a2 /* if (dividend < 0), return -udividend */
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.Lpositive:
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abi_ret_default
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.Lle_one:
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bnez a3, .Lreturn0
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/* Divide by zero: Use an illegal instruction to force an exception.
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The subsequent "DIV0" string can be recognized by the exception
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handler to identify the real cause of the exception. */
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ill
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.ascii "DIV0"
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.Lreturn0:
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movi a2, 0
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#endif /* XCHAL_HAVE_DIV32 */
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abi_ret_default
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ENDPROC(__modsi3)
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EXPORT_SYMBOL(__modsi3)
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#if !XCHAL_HAVE_NSA
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.section .rodata
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.align 4
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.global __nsau_data
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.type __nsau_data, @object
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__nsau_data:
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.byte 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4
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.byte 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3
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.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
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.byte 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.size __nsau_data, . - __nsau_data
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#endif /* !XCHAL_HAVE_NSA */
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