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0bc77f3f06
The pixel rate control is required by the OMAP3 ISP driver and should be implemented by all media controller-compatible sensor drivers. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
834 lines
23 KiB
C
834 lines
23 KiB
C
/*
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* Driver for MT9T001 CMOS Image Sensor from Aptina (Micron)
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*
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* Copyright (C) 2010-2011, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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*
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* Based on the MT9M001 driver,
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*
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* Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/log2.h>
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#include <linux/slab.h>
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#include <linux/videodev2.h>
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#include <linux/v4l2-mediabus.h>
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#include <media/mt9t001.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-subdev.h>
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#define MT9T001_PIXEL_ARRAY_HEIGHT 1568
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#define MT9T001_PIXEL_ARRAY_WIDTH 2112
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#define MT9T001_CHIP_VERSION 0x00
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#define MT9T001_CHIP_ID 0x1621
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#define MT9T001_ROW_START 0x01
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#define MT9T001_ROW_START_MIN 0
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#define MT9T001_ROW_START_DEF 20
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#define MT9T001_ROW_START_MAX 1534
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#define MT9T001_COLUMN_START 0x02
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#define MT9T001_COLUMN_START_MIN 0
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#define MT9T001_COLUMN_START_DEF 32
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#define MT9T001_COLUMN_START_MAX 2046
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#define MT9T001_WINDOW_HEIGHT 0x03
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#define MT9T001_WINDOW_HEIGHT_MIN 1
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#define MT9T001_WINDOW_HEIGHT_DEF 1535
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#define MT9T001_WINDOW_HEIGHT_MAX 1567
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#define MT9T001_WINDOW_WIDTH 0x04
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#define MT9T001_WINDOW_WIDTH_MIN 1
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#define MT9T001_WINDOW_WIDTH_DEF 2047
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#define MT9T001_WINDOW_WIDTH_MAX 2111
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#define MT9T001_HORIZONTAL_BLANKING 0x05
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#define MT9T001_HORIZONTAL_BLANKING_MIN 21
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#define MT9T001_HORIZONTAL_BLANKING_MAX 1023
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#define MT9T001_VERTICAL_BLANKING 0x06
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#define MT9T001_VERTICAL_BLANKING_MIN 3
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#define MT9T001_VERTICAL_BLANKING_MAX 1023
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#define MT9T001_OUTPUT_CONTROL 0x07
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#define MT9T001_OUTPUT_CONTROL_SYNC (1 << 0)
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#define MT9T001_OUTPUT_CONTROL_CHIP_ENABLE (1 << 1)
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#define MT9T001_OUTPUT_CONTROL_TEST_DATA (1 << 6)
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#define MT9T001_SHUTTER_WIDTH_HIGH 0x08
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#define MT9T001_SHUTTER_WIDTH_LOW 0x09
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#define MT9T001_SHUTTER_WIDTH_MIN 1
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#define MT9T001_SHUTTER_WIDTH_DEF 1561
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#define MT9T001_SHUTTER_WIDTH_MAX (1024 * 1024)
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#define MT9T001_PIXEL_CLOCK 0x0a
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#define MT9T001_PIXEL_CLOCK_INVERT (1 << 15)
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#define MT9T001_PIXEL_CLOCK_SHIFT_MASK (7 << 8)
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#define MT9T001_PIXEL_CLOCK_SHIFT_SHIFT 8
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#define MT9T001_PIXEL_CLOCK_DIVIDE_MASK (0x7f << 0)
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#define MT9T001_FRAME_RESTART 0x0b
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#define MT9T001_SHUTTER_DELAY 0x0c
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#define MT9T001_SHUTTER_DELAY_MAX 2047
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#define MT9T001_RESET 0x0d
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#define MT9T001_READ_MODE1 0x1e
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#define MT9T001_READ_MODE_SNAPSHOT (1 << 8)
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#define MT9T001_READ_MODE_STROBE_ENABLE (1 << 9)
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#define MT9T001_READ_MODE_STROBE_WIDTH (1 << 10)
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#define MT9T001_READ_MODE_STROBE_OVERRIDE (1 << 11)
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#define MT9T001_READ_MODE2 0x20
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#define MT9T001_READ_MODE_BAD_FRAMES (1 << 0)
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#define MT9T001_READ_MODE_LINE_VALID_CONTINUOUS (1 << 9)
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#define MT9T001_READ_MODE_LINE_VALID_FRAME (1 << 10)
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#define MT9T001_READ_MODE3 0x21
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#define MT9T001_READ_MODE_GLOBAL_RESET (1 << 0)
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#define MT9T001_READ_MODE_GHST_CTL (1 << 1)
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#define MT9T001_ROW_ADDRESS_MODE 0x22
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#define MT9T001_ROW_SKIP_MASK (7 << 0)
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#define MT9T001_ROW_BIN_MASK (3 << 3)
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#define MT9T001_ROW_BIN_SHIFT 3
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#define MT9T001_COLUMN_ADDRESS_MODE 0x23
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#define MT9T001_COLUMN_SKIP_MASK (7 << 0)
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#define MT9T001_COLUMN_BIN_MASK (3 << 3)
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#define MT9T001_COLUMN_BIN_SHIFT 3
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#define MT9T001_GREEN1_GAIN 0x2b
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#define MT9T001_BLUE_GAIN 0x2c
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#define MT9T001_RED_GAIN 0x2d
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#define MT9T001_GREEN2_GAIN 0x2e
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#define MT9T001_TEST_DATA 0x32
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#define MT9T001_GLOBAL_GAIN 0x35
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#define MT9T001_GLOBAL_GAIN_MIN 8
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#define MT9T001_GLOBAL_GAIN_MAX 1024
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#define MT9T001_BLACK_LEVEL 0x49
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#define MT9T001_ROW_BLACK_DEFAULT_OFFSET 0x4b
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#define MT9T001_BLC_DELTA_THRESHOLDS 0x5d
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#define MT9T001_CAL_THRESHOLDS 0x5f
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#define MT9T001_GREEN1_OFFSET 0x60
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#define MT9T001_GREEN2_OFFSET 0x61
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#define MT9T001_BLACK_LEVEL_CALIBRATION 0x62
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#define MT9T001_BLACK_LEVEL_OVERRIDE (1 << 0)
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#define MT9T001_BLACK_LEVEL_DISABLE_OFFSET (1 << 1)
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#define MT9T001_BLACK_LEVEL_RECALCULATE (1 << 12)
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#define MT9T001_BLACK_LEVEL_LOCK_RED_BLUE (1 << 13)
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#define MT9T001_BLACK_LEVEL_LOCK_GREEN (1 << 14)
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#define MT9T001_RED_OFFSET 0x63
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#define MT9T001_BLUE_OFFSET 0x64
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struct mt9t001 {
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struct v4l2_subdev subdev;
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struct media_pad pad;
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struct v4l2_mbus_framefmt format;
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struct v4l2_rect crop;
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struct v4l2_ctrl_handler ctrls;
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struct v4l2_ctrl *gains[4];
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u16 output_control;
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u16 black_level;
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};
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static inline struct mt9t001 *to_mt9t001(struct v4l2_subdev *sd)
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{
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return container_of(sd, struct mt9t001, subdev);
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}
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static int mt9t001_read(struct i2c_client *client, u8 reg)
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{
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return i2c_smbus_read_word_swapped(client, reg);
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}
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static int mt9t001_write(struct i2c_client *client, u8 reg, u16 data)
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{
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return i2c_smbus_write_word_swapped(client, reg, data);
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}
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static int mt9t001_set_output_control(struct mt9t001 *mt9t001, u16 clear,
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u16 set)
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{
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struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
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u16 value = (mt9t001->output_control & ~clear) | set;
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int ret;
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if (value == mt9t001->output_control)
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return 0;
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ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, value);
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if (ret < 0)
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return ret;
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mt9t001->output_control = value;
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return 0;
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}
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/* -----------------------------------------------------------------------------
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* V4L2 subdev video operations
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*/
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static struct v4l2_mbus_framefmt *
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__mt9t001_get_pad_format(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
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unsigned int pad, enum v4l2_subdev_format_whence which)
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{
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switch (which) {
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case V4L2_SUBDEV_FORMAT_TRY:
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return v4l2_subdev_get_try_format(fh, pad);
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case V4L2_SUBDEV_FORMAT_ACTIVE:
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return &mt9t001->format;
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default:
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return NULL;
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}
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}
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static struct v4l2_rect *
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__mt9t001_get_pad_crop(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
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unsigned int pad, enum v4l2_subdev_format_whence which)
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{
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switch (which) {
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case V4L2_SUBDEV_FORMAT_TRY:
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return v4l2_subdev_get_try_crop(fh, pad);
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case V4L2_SUBDEV_FORMAT_ACTIVE:
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return &mt9t001->crop;
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default:
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return NULL;
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}
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}
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static int mt9t001_s_stream(struct v4l2_subdev *subdev, int enable)
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{
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const u16 mode = MT9T001_OUTPUT_CONTROL_CHIP_ENABLE;
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struct i2c_client *client = v4l2_get_subdevdata(subdev);
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struct mt9t001 *mt9t001 = to_mt9t001(subdev);
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struct v4l2_mbus_framefmt *format = &mt9t001->format;
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struct v4l2_rect *crop = &mt9t001->crop;
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unsigned int hratio;
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unsigned int vratio;
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int ret;
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if (!enable)
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return mt9t001_set_output_control(mt9t001, mode, 0);
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/* Configure the window size and row/column bin */
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hratio = DIV_ROUND_CLOSEST(crop->width, format->width);
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vratio = DIV_ROUND_CLOSEST(crop->height, format->height);
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ret = mt9t001_write(client, MT9T001_ROW_ADDRESS_MODE, hratio - 1);
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if (ret < 0)
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return ret;
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ret = mt9t001_write(client, MT9T001_COLUMN_ADDRESS_MODE, vratio - 1);
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if (ret < 0)
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return ret;
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ret = mt9t001_write(client, MT9T001_COLUMN_START, crop->left);
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if (ret < 0)
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return ret;
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ret = mt9t001_write(client, MT9T001_ROW_START, crop->top);
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if (ret < 0)
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return ret;
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ret = mt9t001_write(client, MT9T001_WINDOW_WIDTH, crop->width - 1);
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if (ret < 0)
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return ret;
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ret = mt9t001_write(client, MT9T001_WINDOW_HEIGHT, crop->height - 1);
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if (ret < 0)
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return ret;
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/* Switch to master "normal" mode */
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return mt9t001_set_output_control(mt9t001, 0, mode);
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}
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static int mt9t001_enum_mbus_code(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_mbus_code_enum *code)
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{
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if (code->index > 0)
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return -EINVAL;
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code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
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return 0;
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}
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static int mt9t001_enum_frame_size(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_frame_size_enum *fse)
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{
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if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
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return -EINVAL;
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fse->min_width = (MT9T001_WINDOW_WIDTH_DEF + 1) / fse->index;
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fse->max_width = fse->min_width;
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fse->min_height = (MT9T001_WINDOW_HEIGHT_DEF + 1) / fse->index;
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fse->max_height = fse->min_height;
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return 0;
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}
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static int mt9t001_get_format(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_format *format)
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{
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struct mt9t001 *mt9t001 = to_mt9t001(subdev);
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format->format = *__mt9t001_get_pad_format(mt9t001, fh, format->pad,
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format->which);
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return 0;
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}
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static int mt9t001_set_format(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_format *format)
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{
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struct mt9t001 *mt9t001 = to_mt9t001(subdev);
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struct v4l2_mbus_framefmt *__format;
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struct v4l2_rect *__crop;
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unsigned int width;
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unsigned int height;
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unsigned int hratio;
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unsigned int vratio;
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__crop = __mt9t001_get_pad_crop(mt9t001, fh, format->pad,
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format->which);
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/* Clamp the width and height to avoid dividing by zero. */
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width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
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max(__crop->width / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
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__crop->width);
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height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
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max(__crop->height / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
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__crop->height);
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hratio = DIV_ROUND_CLOSEST(__crop->width, width);
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vratio = DIV_ROUND_CLOSEST(__crop->height, height);
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__format = __mt9t001_get_pad_format(mt9t001, fh, format->pad,
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format->which);
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__format->width = __crop->width / hratio;
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__format->height = __crop->height / vratio;
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format->format = *__format;
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return 0;
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}
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static int mt9t001_get_crop(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_crop *crop)
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{
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struct mt9t001 *mt9t001 = to_mt9t001(subdev);
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crop->rect = *__mt9t001_get_pad_crop(mt9t001, fh, crop->pad,
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crop->which);
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return 0;
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}
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static int mt9t001_set_crop(struct v4l2_subdev *subdev,
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struct v4l2_subdev_fh *fh,
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struct v4l2_subdev_crop *crop)
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{
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struct mt9t001 *mt9t001 = to_mt9t001(subdev);
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struct v4l2_mbus_framefmt *__format;
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struct v4l2_rect *__crop;
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struct v4l2_rect rect;
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/* Clamp the crop rectangle boundaries and align them to a multiple of 2
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* pixels.
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*/
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rect.left = clamp(ALIGN(crop->rect.left, 2),
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MT9T001_COLUMN_START_MIN,
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MT9T001_COLUMN_START_MAX);
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rect.top = clamp(ALIGN(crop->rect.top, 2),
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MT9T001_ROW_START_MIN,
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MT9T001_ROW_START_MAX);
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rect.width = clamp(ALIGN(crop->rect.width, 2),
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MT9T001_WINDOW_WIDTH_MIN + 1,
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MT9T001_WINDOW_WIDTH_MAX + 1);
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rect.height = clamp(ALIGN(crop->rect.height, 2),
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MT9T001_WINDOW_HEIGHT_MIN + 1,
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MT9T001_WINDOW_HEIGHT_MAX + 1);
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rect.width = min(rect.width, MT9T001_PIXEL_ARRAY_WIDTH - rect.left);
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rect.height = min(rect.height, MT9T001_PIXEL_ARRAY_HEIGHT - rect.top);
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__crop = __mt9t001_get_pad_crop(mt9t001, fh, crop->pad, crop->which);
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if (rect.width != __crop->width || rect.height != __crop->height) {
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/* Reset the output image size if the crop rectangle size has
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* been modified.
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*/
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__format = __mt9t001_get_pad_format(mt9t001, fh, crop->pad,
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crop->which);
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__format->width = rect.width;
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__format->height = rect.height;
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}
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*__crop = rect;
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crop->rect = rect;
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return 0;
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}
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/* -----------------------------------------------------------------------------
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* V4L2 subdev control operations
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*/
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#define V4L2_CID_TEST_PATTERN (V4L2_CID_USER_BASE | 0x1001)
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#define V4L2_CID_BLACK_LEVEL_AUTO (V4L2_CID_USER_BASE | 0x1002)
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#define V4L2_CID_BLACK_LEVEL_OFFSET (V4L2_CID_USER_BASE | 0x1003)
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#define V4L2_CID_BLACK_LEVEL_CALIBRATE (V4L2_CID_USER_BASE | 0x1004)
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#define V4L2_CID_GAIN_RED (V4L2_CTRL_CLASS_CAMERA | 0x1001)
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#define V4L2_CID_GAIN_GREEN_RED (V4L2_CTRL_CLASS_CAMERA | 0x1002)
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#define V4L2_CID_GAIN_GREEN_BLUE (V4L2_CTRL_CLASS_CAMERA | 0x1003)
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#define V4L2_CID_GAIN_BLUE (V4L2_CTRL_CLASS_CAMERA | 0x1004)
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static u16 mt9t001_gain_value(s32 *gain)
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{
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/* Gain is controlled by 2 analog stages and a digital stage. Valid
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* values for the 3 stages are
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*
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* Stage Min Max Step
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* ------------------------------------------
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* First analog stage x1 x2 1
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* Second analog stage x1 x4 0.125
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* Digital stage x1 x16 0.125
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*
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* To minimize noise, the gain stages should be used in the second
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* analog stage, first analog stage, digital stage order. Gain from a
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* previous stage should be pushed to its maximum value before the next
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* stage is used.
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*/
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if (*gain <= 32)
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return *gain;
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if (*gain <= 64) {
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*gain &= ~1;
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return (1 << 6) | (*gain >> 1);
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}
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*gain &= ~7;
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return ((*gain - 64) << 5) | (1 << 6) | 32;
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}
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static int mt9t001_ctrl_freeze(struct mt9t001 *mt9t001, bool freeze)
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{
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return mt9t001_set_output_control(mt9t001,
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freeze ? 0 : MT9T001_OUTPUT_CONTROL_SYNC,
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freeze ? MT9T001_OUTPUT_CONTROL_SYNC : 0);
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}
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|
|
static int mt9t001_s_ctrl(struct v4l2_ctrl *ctrl)
|
|
{
|
|
static const u8 gains[4] = {
|
|
MT9T001_RED_GAIN, MT9T001_GREEN1_GAIN,
|
|
MT9T001_GREEN2_GAIN, MT9T001_BLUE_GAIN
|
|
};
|
|
|
|
struct mt9t001 *mt9t001 =
|
|
container_of(ctrl->handler, struct mt9t001, ctrls);
|
|
struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
|
|
unsigned int count;
|
|
unsigned int i;
|
|
u16 value;
|
|
int ret;
|
|
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_GAIN_RED:
|
|
case V4L2_CID_GAIN_GREEN_RED:
|
|
case V4L2_CID_GAIN_GREEN_BLUE:
|
|
case V4L2_CID_GAIN_BLUE:
|
|
|
|
/* Disable control updates if more than one control has changed
|
|
* in the cluster.
|
|
*/
|
|
for (i = 0, count = 0; i < 4; ++i) {
|
|
struct v4l2_ctrl *gain = mt9t001->gains[i];
|
|
|
|
if (gain->val != gain->cur.val)
|
|
count++;
|
|
}
|
|
|
|
if (count > 1) {
|
|
ret = mt9t001_ctrl_freeze(mt9t001, true);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
/* Update the gain controls. */
|
|
for (i = 0; i < 4; ++i) {
|
|
struct v4l2_ctrl *gain = mt9t001->gains[i];
|
|
|
|
if (gain->val == gain->cur.val)
|
|
continue;
|
|
|
|
value = mt9t001_gain_value(&gain->val);
|
|
ret = mt9t001_write(client, gains[i], value);
|
|
if (ret < 0) {
|
|
mt9t001_ctrl_freeze(mt9t001, false);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
/* Enable control updates. */
|
|
if (count > 1) {
|
|
ret = mt9t001_ctrl_freeze(mt9t001, false);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
break;
|
|
|
|
case V4L2_CID_EXPOSURE:
|
|
ret = mt9t001_write(client, MT9T001_SHUTTER_WIDTH_LOW,
|
|
ctrl->val & 0xffff);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return mt9t001_write(client, MT9T001_SHUTTER_WIDTH_HIGH,
|
|
ctrl->val >> 16);
|
|
|
|
case V4L2_CID_TEST_PATTERN:
|
|
ret = mt9t001_set_output_control(mt9t001,
|
|
ctrl->val ? 0 : MT9T001_OUTPUT_CONTROL_TEST_DATA,
|
|
ctrl->val ? MT9T001_OUTPUT_CONTROL_TEST_DATA : 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return mt9t001_write(client, MT9T001_TEST_DATA, ctrl->val << 2);
|
|
|
|
case V4L2_CID_BLACK_LEVEL_AUTO:
|
|
value = ctrl->val ? 0 : MT9T001_BLACK_LEVEL_OVERRIDE;
|
|
ret = mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
|
|
value);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
mt9t001->black_level = value;
|
|
break;
|
|
|
|
case V4L2_CID_BLACK_LEVEL_OFFSET:
|
|
ret = mt9t001_write(client, MT9T001_GREEN1_OFFSET, ctrl->val);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = mt9t001_write(client, MT9T001_GREEN2_OFFSET, ctrl->val);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = mt9t001_write(client, MT9T001_RED_OFFSET, ctrl->val);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return mt9t001_write(client, MT9T001_BLUE_OFFSET, ctrl->val);
|
|
|
|
case V4L2_CID_BLACK_LEVEL_CALIBRATE:
|
|
return mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
|
|
MT9T001_BLACK_LEVEL_RECALCULATE |
|
|
mt9t001->black_level);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct v4l2_ctrl_ops mt9t001_ctrl_ops = {
|
|
.s_ctrl = mt9t001_s_ctrl,
|
|
};
|
|
|
|
static const struct v4l2_ctrl_config mt9t001_ctrls[] = {
|
|
{
|
|
.ops = &mt9t001_ctrl_ops,
|
|
.id = V4L2_CID_TEST_PATTERN,
|
|
.type = V4L2_CTRL_TYPE_INTEGER,
|
|
.name = "Test pattern",
|
|
.min = 0,
|
|
.max = 1023,
|
|
.step = 1,
|
|
.def = 0,
|
|
.flags = 0,
|
|
}, {
|
|
.ops = &mt9t001_ctrl_ops,
|
|
.id = V4L2_CID_BLACK_LEVEL_AUTO,
|
|
.type = V4L2_CTRL_TYPE_BOOLEAN,
|
|
.name = "Black Level, Auto",
|
|
.min = 0,
|
|
.max = 1,
|
|
.step = 1,
|
|
.def = 1,
|
|
.flags = 0,
|
|
}, {
|
|
.ops = &mt9t001_ctrl_ops,
|
|
.id = V4L2_CID_BLACK_LEVEL_OFFSET,
|
|
.type = V4L2_CTRL_TYPE_INTEGER,
|
|
.name = "Black Level, Offset",
|
|
.min = -256,
|
|
.max = 255,
|
|
.step = 1,
|
|
.def = 32,
|
|
.flags = 0,
|
|
}, {
|
|
.ops = &mt9t001_ctrl_ops,
|
|
.id = V4L2_CID_BLACK_LEVEL_CALIBRATE,
|
|
.type = V4L2_CTRL_TYPE_BUTTON,
|
|
.name = "Black Level, Calibrate",
|
|
.min = 0,
|
|
.max = 0,
|
|
.step = 0,
|
|
.def = 0,
|
|
.flags = V4L2_CTRL_FLAG_WRITE_ONLY,
|
|
},
|
|
};
|
|
|
|
static const struct v4l2_ctrl_config mt9t001_gains[] = {
|
|
{
|
|
.ops = &mt9t001_ctrl_ops,
|
|
.id = V4L2_CID_GAIN_RED,
|
|
.type = V4L2_CTRL_TYPE_INTEGER,
|
|
.name = "Gain, Red",
|
|
.min = MT9T001_GLOBAL_GAIN_MIN,
|
|
.max = MT9T001_GLOBAL_GAIN_MAX,
|
|
.step = 1,
|
|
.def = MT9T001_GLOBAL_GAIN_MIN,
|
|
.flags = 0,
|
|
}, {
|
|
.ops = &mt9t001_ctrl_ops,
|
|
.id = V4L2_CID_GAIN_GREEN_RED,
|
|
.type = V4L2_CTRL_TYPE_INTEGER,
|
|
.name = "Gain, Green (R)",
|
|
.min = MT9T001_GLOBAL_GAIN_MIN,
|
|
.max = MT9T001_GLOBAL_GAIN_MAX,
|
|
.step = 1,
|
|
.def = MT9T001_GLOBAL_GAIN_MIN,
|
|
.flags = 0,
|
|
}, {
|
|
.ops = &mt9t001_ctrl_ops,
|
|
.id = V4L2_CID_GAIN_GREEN_BLUE,
|
|
.type = V4L2_CTRL_TYPE_INTEGER,
|
|
.name = "Gain, Green (B)",
|
|
.min = MT9T001_GLOBAL_GAIN_MIN,
|
|
.max = MT9T001_GLOBAL_GAIN_MAX,
|
|
.step = 1,
|
|
.def = MT9T001_GLOBAL_GAIN_MIN,
|
|
.flags = 0,
|
|
}, {
|
|
.ops = &mt9t001_ctrl_ops,
|
|
.id = V4L2_CID_GAIN_BLUE,
|
|
.type = V4L2_CTRL_TYPE_INTEGER,
|
|
.name = "Gain, Blue",
|
|
.min = MT9T001_GLOBAL_GAIN_MIN,
|
|
.max = MT9T001_GLOBAL_GAIN_MAX,
|
|
.step = 1,
|
|
.def = MT9T001_GLOBAL_GAIN_MIN,
|
|
.flags = 0,
|
|
},
|
|
};
|
|
|
|
/* -----------------------------------------------------------------------------
|
|
* V4L2 subdev internal operations
|
|
*/
|
|
|
|
static int mt9t001_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
|
|
{
|
|
struct v4l2_mbus_framefmt *format;
|
|
struct v4l2_rect *crop;
|
|
|
|
crop = v4l2_subdev_get_try_crop(fh, 0);
|
|
crop->left = MT9T001_COLUMN_START_DEF;
|
|
crop->top = MT9T001_ROW_START_DEF;
|
|
crop->width = MT9T001_WINDOW_WIDTH_DEF + 1;
|
|
crop->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
|
|
|
|
format = v4l2_subdev_get_try_format(fh, 0);
|
|
format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
|
|
format->width = MT9T001_WINDOW_WIDTH_DEF + 1;
|
|
format->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
|
|
format->field = V4L2_FIELD_NONE;
|
|
format->colorspace = V4L2_COLORSPACE_SRGB;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct v4l2_subdev_video_ops mt9t001_subdev_video_ops = {
|
|
.s_stream = mt9t001_s_stream,
|
|
};
|
|
|
|
static struct v4l2_subdev_pad_ops mt9t001_subdev_pad_ops = {
|
|
.enum_mbus_code = mt9t001_enum_mbus_code,
|
|
.enum_frame_size = mt9t001_enum_frame_size,
|
|
.get_fmt = mt9t001_get_format,
|
|
.set_fmt = mt9t001_set_format,
|
|
.get_crop = mt9t001_get_crop,
|
|
.set_crop = mt9t001_set_crop,
|
|
};
|
|
|
|
static struct v4l2_subdev_ops mt9t001_subdev_ops = {
|
|
.video = &mt9t001_subdev_video_ops,
|
|
.pad = &mt9t001_subdev_pad_ops,
|
|
};
|
|
|
|
static struct v4l2_subdev_internal_ops mt9t001_subdev_internal_ops = {
|
|
.open = mt9t001_open,
|
|
};
|
|
|
|
static int mt9t001_video_probe(struct i2c_client *client)
|
|
{
|
|
struct mt9t001_platform_data *pdata = client->dev.platform_data;
|
|
s32 data;
|
|
int ret;
|
|
|
|
dev_info(&client->dev, "Probing MT9T001 at address 0x%02x\n",
|
|
client->addr);
|
|
|
|
/* Reset the chip and stop data read out */
|
|
ret = mt9t001_write(client, MT9T001_RESET, 1);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = mt9t001_write(client, MT9T001_RESET, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, 0);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* Configure the pixel clock polarity */
|
|
if (pdata->clk_pol) {
|
|
ret = mt9t001_write(client, MT9T001_PIXEL_CLOCK,
|
|
MT9T001_PIXEL_CLOCK_INVERT);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
/* Read and check the sensor version */
|
|
data = mt9t001_read(client, MT9T001_CHIP_VERSION);
|
|
if (data != MT9T001_CHIP_ID) {
|
|
dev_err(&client->dev, "MT9T001 not detected, wrong version "
|
|
"0x%04x\n", data);
|
|
return -ENODEV;
|
|
}
|
|
|
|
dev_info(&client->dev, "MT9T001 detected at address 0x%02x\n",
|
|
client->addr);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int mt9t001_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *did)
|
|
{
|
|
struct mt9t001_platform_data *pdata = client->dev.platform_data;
|
|
struct mt9t001 *mt9t001;
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
if (pdata == NULL) {
|
|
dev_err(&client->dev, "No platform data\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (!i2c_check_functionality(client->adapter,
|
|
I2C_FUNC_SMBUS_WORD_DATA)) {
|
|
dev_warn(&client->adapter->dev,
|
|
"I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
|
|
return -EIO;
|
|
}
|
|
|
|
ret = mt9t001_video_probe(client);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
mt9t001 = kzalloc(sizeof(*mt9t001), GFP_KERNEL);
|
|
if (!mt9t001)
|
|
return -ENOMEM;
|
|
|
|
v4l2_ctrl_handler_init(&mt9t001->ctrls, ARRAY_SIZE(mt9t001_ctrls) +
|
|
ARRAY_SIZE(mt9t001_gains) + 3);
|
|
|
|
v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
|
|
V4L2_CID_EXPOSURE, MT9T001_SHUTTER_WIDTH_MIN,
|
|
MT9T001_SHUTTER_WIDTH_MAX, 1,
|
|
MT9T001_SHUTTER_WIDTH_DEF);
|
|
v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
|
|
V4L2_CID_BLACK_LEVEL, 1, 1, 1, 1);
|
|
v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
|
|
V4L2_CID_PIXEL_RATE, pdata->ext_clk, pdata->ext_clk,
|
|
1, pdata->ext_clk);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(mt9t001_ctrls); ++i)
|
|
v4l2_ctrl_new_custom(&mt9t001->ctrls, &mt9t001_ctrls[i], NULL);
|
|
|
|
for (i = 0; i < ARRAY_SIZE(mt9t001_gains); ++i)
|
|
mt9t001->gains[i] = v4l2_ctrl_new_custom(&mt9t001->ctrls,
|
|
&mt9t001_gains[i], NULL);
|
|
|
|
v4l2_ctrl_cluster(ARRAY_SIZE(mt9t001_gains), mt9t001->gains);
|
|
|
|
mt9t001->subdev.ctrl_handler = &mt9t001->ctrls;
|
|
|
|
if (mt9t001->ctrls.error) {
|
|
printk(KERN_INFO "%s: control initialization error %d\n",
|
|
__func__, mt9t001->ctrls.error);
|
|
ret = -EINVAL;
|
|
goto done;
|
|
}
|
|
|
|
mt9t001->crop.left = MT9T001_COLUMN_START_DEF;
|
|
mt9t001->crop.top = MT9T001_ROW_START_DEF;
|
|
mt9t001->crop.width = MT9T001_WINDOW_WIDTH_DEF + 1;
|
|
mt9t001->crop.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
|
|
|
|
mt9t001->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
|
|
mt9t001->format.width = MT9T001_WINDOW_WIDTH_DEF + 1;
|
|
mt9t001->format.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
|
|
mt9t001->format.field = V4L2_FIELD_NONE;
|
|
mt9t001->format.colorspace = V4L2_COLORSPACE_SRGB;
|
|
|
|
v4l2_i2c_subdev_init(&mt9t001->subdev, client, &mt9t001_subdev_ops);
|
|
mt9t001->subdev.internal_ops = &mt9t001_subdev_internal_ops;
|
|
mt9t001->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
|
|
|
|
mt9t001->pad.flags = MEDIA_PAD_FL_SOURCE;
|
|
ret = media_entity_init(&mt9t001->subdev.entity, 1, &mt9t001->pad, 0);
|
|
|
|
done:
|
|
if (ret < 0) {
|
|
v4l2_ctrl_handler_free(&mt9t001->ctrls);
|
|
media_entity_cleanup(&mt9t001->subdev.entity);
|
|
kfree(mt9t001);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int mt9t001_remove(struct i2c_client *client)
|
|
{
|
|
struct v4l2_subdev *subdev = i2c_get_clientdata(client);
|
|
struct mt9t001 *mt9t001 = to_mt9t001(subdev);
|
|
|
|
v4l2_ctrl_handler_free(&mt9t001->ctrls);
|
|
v4l2_device_unregister_subdev(subdev);
|
|
media_entity_cleanup(&subdev->entity);
|
|
kfree(mt9t001);
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id mt9t001_id[] = {
|
|
{ "mt9t001", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, mt9t001_id);
|
|
|
|
static struct i2c_driver mt9t001_driver = {
|
|
.driver = {
|
|
.name = "mt9t001",
|
|
},
|
|
.probe = mt9t001_probe,
|
|
.remove = mt9t001_remove,
|
|
.id_table = mt9t001_id,
|
|
};
|
|
|
|
module_i2c_driver(mt9t001_driver);
|
|
|
|
MODULE_DESCRIPTION("Aptina (Micron) MT9T001 Camera driver");
|
|
MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
|
|
MODULE_LICENSE("GPL");
|