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9dfbff16b4
Commit ba0d7ed391 "ARM: dts: enable ahci sata and sata phy for
exynos5250" added a new binding document for the sata phy device,
and changed the sata controller binding. However, in both cases
significant aspects of the binding remained undocumented.
This attempts to reconstruct the actual binding from the usage.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
31 lines
945 B
Plaintext
31 lines
945 B
Plaintext
* Samsung AHCI SATA Controller
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SATA nodes are defined to describe on-chip Serial ATA controllers.
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Each SATA controller should have its own node.
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Required properties:
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- compatible : compatible list, contains "samsung,exynos5-sata"
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- interrupts : <interrupt mapping for SATA IRQ>
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- reg : <registers mapping>
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- samsung,sata-freq : <frequency in MHz>
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- phys : Must contain exactly one entry as specified
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in phy-bindings.txt
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- phy-names : Must be "sata-phy"
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Optional properties:
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- clocks : Must contain an entry for each entry in clock-names.
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- clock-names : Shall be "sata" for the external SATA bus clock,
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and "sclk_sata" for the internal controller clock.
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Example:
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sata@122f0000 {
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compatible = "snps,dwc-ahci";
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samsung,sata-freq = <66>;
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reg = <0x122f0000 0x1ff>;
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interrupts = <0 115 0>;
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clocks = <&clock 277>, <&clock 143>;
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clock-names = "sata", "sclk_sata";
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phys = <&sata_phy>;
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phy-names = "sata-phy";
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};
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