linux/Documentation/devicetree/bindings/sram/rockchip-pmu-sram.txt
Krzysztof Kozlowski 22697acdd7 dt-bindings: Consolidate SRAM bindings from all vendors
SRAM bindings for various SoCs, using the mmio-sram genalloc
API, are spread over different places - per SoC vendor. Since all of
these are quite similar (they depend on mmio-sram) move them to a common
place.

Suggested-by: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Kukjin Kim <kgene@kernel.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Rob Herring <robh@kernel.org>
2015-12-09 15:29:37 -06:00

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Rockchip SRAM for pmu:
------------------------------
The sram of pmu is used to store the function of resume from maskrom(the 1st
level loader). This is a common use of the "pmu-sram" because it keeps power
even in low power states in the system.
Required node properties:
- compatible : should be "rockchip,rk3288-pmu-sram"
- reg : physical base address and the size of the registers window
Example:
sram@ff720000 {
compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
reg = <0xff720000 0x1000>;
};