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19a5217812
This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Link: https://lore.kernel.org/r/1620896249-52769-1-git-send-email-zou_wei@huawei.com Signed-off-by: Joel Stanley <joel@jms.id.au>
898 lines
21 KiB
C
898 lines
21 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* A FSI master controller, using a simple GPIO bit-banging interface
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*/
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#include <linux/crc4.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/fsi.h>
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#include <linux/gpio/consumer.h>
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#include <linux/io.h>
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#include <linux/irqflags.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "fsi-master.h"
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#define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */
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#define LAST_ADDR_INVALID 0x1
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struct fsi_master_gpio {
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struct fsi_master master;
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struct device *dev;
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struct mutex cmd_lock; /* mutex for command ordering */
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struct gpio_desc *gpio_clk;
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struct gpio_desc *gpio_data;
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struct gpio_desc *gpio_trans; /* Voltage translator */
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struct gpio_desc *gpio_enable; /* FSI enable */
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struct gpio_desc *gpio_mux; /* Mux control */
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bool external_mode;
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bool no_delays;
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uint32_t last_addr;
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uint8_t t_send_delay;
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uint8_t t_echo_delay;
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};
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#define CREATE_TRACE_POINTS
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#include <trace/events/fsi_master_gpio.h>
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#define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master)
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struct fsi_gpio_msg {
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uint64_t msg;
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uint8_t bits;
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};
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static void clock_toggle(struct fsi_master_gpio *master, int count)
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{
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int i;
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for (i = 0; i < count; i++) {
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if (!master->no_delays)
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ndelay(FSI_GPIO_STD_DLY);
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gpiod_set_value(master->gpio_clk, 0);
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if (!master->no_delays)
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ndelay(FSI_GPIO_STD_DLY);
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gpiod_set_value(master->gpio_clk, 1);
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}
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}
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static int sda_clock_in(struct fsi_master_gpio *master)
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{
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int in;
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if (!master->no_delays)
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ndelay(FSI_GPIO_STD_DLY);
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gpiod_set_value(master->gpio_clk, 0);
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/* Dummy read to feed the synchronizers */
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gpiod_get_value(master->gpio_data);
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/* Actual data read */
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in = gpiod_get_value(master->gpio_data);
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if (!master->no_delays)
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ndelay(FSI_GPIO_STD_DLY);
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gpiod_set_value(master->gpio_clk, 1);
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return in ? 1 : 0;
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}
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static void sda_out(struct fsi_master_gpio *master, int value)
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{
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gpiod_set_value(master->gpio_data, value);
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}
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static void set_sda_input(struct fsi_master_gpio *master)
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{
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gpiod_direction_input(master->gpio_data);
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gpiod_set_value(master->gpio_trans, 0);
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}
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static void set_sda_output(struct fsi_master_gpio *master, int value)
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{
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gpiod_set_value(master->gpio_trans, 1);
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gpiod_direction_output(master->gpio_data, value);
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}
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static void clock_zeros(struct fsi_master_gpio *master, int count)
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{
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trace_fsi_master_gpio_clock_zeros(master, count);
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set_sda_output(master, 1);
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clock_toggle(master, count);
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}
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static void echo_delay(struct fsi_master_gpio *master)
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{
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clock_zeros(master, master->t_echo_delay);
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}
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static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg,
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uint8_t num_bits)
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{
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uint8_t bit, in_bit;
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set_sda_input(master);
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for (bit = 0; bit < num_bits; bit++) {
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in_bit = sda_clock_in(master);
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msg->msg <<= 1;
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msg->msg |= ~in_bit & 0x1; /* Data is active low */
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}
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msg->bits += num_bits;
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trace_fsi_master_gpio_in(master, num_bits, msg->msg);
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}
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static void serial_out(struct fsi_master_gpio *master,
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const struct fsi_gpio_msg *cmd)
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{
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uint8_t bit;
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uint64_t msg = ~cmd->msg; /* Data is active low */
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uint64_t sda_mask = 0x1ULL << (cmd->bits - 1);
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uint64_t last_bit = ~0;
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int next_bit;
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trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg);
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if (!cmd->bits) {
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dev_warn(master->dev, "trying to output 0 bits\n");
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return;
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}
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set_sda_output(master, 0);
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/* Send the start bit */
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sda_out(master, 0);
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clock_toggle(master, 1);
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/* Send the message */
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for (bit = 0; bit < cmd->bits; bit++) {
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next_bit = (msg & sda_mask) >> (cmd->bits - 1);
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if (last_bit ^ next_bit) {
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sda_out(master, next_bit);
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last_bit = next_bit;
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}
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clock_toggle(master, 1);
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msg <<= 1;
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}
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}
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static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits)
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{
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msg->msg <<= bits;
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msg->msg |= data & ((1ull << bits) - 1);
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msg->bits += bits;
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}
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static void msg_push_crc(struct fsi_gpio_msg *msg)
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{
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uint8_t crc;
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int top;
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top = msg->bits & 0x3;
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/* start bit, and any non-aligned top bits */
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crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
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/* aligned bits */
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crc = crc4(crc, msg->msg, msg->bits - top);
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msg_push_bits(msg, crc, 4);
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}
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static bool check_same_address(struct fsi_master_gpio *master, int id,
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uint32_t addr)
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{
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/* this will also handle LAST_ADDR_INVALID */
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return master->last_addr == (((id & 0x3) << 21) | (addr & ~0x3));
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}
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static bool check_relative_address(struct fsi_master_gpio *master, int id,
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uint32_t addr, uint32_t *rel_addrp)
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{
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uint32_t last_addr = master->last_addr;
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int32_t rel_addr;
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if (last_addr == LAST_ADDR_INVALID)
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return false;
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/* We may be in 23-bit addressing mode, which uses the id as the
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* top two address bits. So, if we're referencing a different ID,
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* use absolute addresses.
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*/
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if (((last_addr >> 21) & 0x3) != id)
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return false;
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/* remove the top two bits from any 23-bit addressing */
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last_addr &= (1 << 21) - 1;
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/* We know that the addresses are limited to 21 bits, so this won't
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* overflow the signed rel_addr */
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rel_addr = addr - last_addr;
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if (rel_addr > 255 || rel_addr < -256)
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return false;
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*rel_addrp = (uint32_t)rel_addr;
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return true;
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}
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static void last_address_update(struct fsi_master_gpio *master,
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int id, bool valid, uint32_t addr)
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{
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if (!valid)
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master->last_addr = LAST_ADDR_INVALID;
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else
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master->last_addr = ((id & 0x3) << 21) | (addr & ~0x3);
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}
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/*
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* Encode an Absolute/Relative/Same Address command
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*/
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static void build_ar_command(struct fsi_master_gpio *master,
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struct fsi_gpio_msg *cmd, uint8_t id,
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uint32_t addr, size_t size, const void *data)
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{
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int i, addr_bits, opcode_bits;
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bool write = !!data;
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uint8_t ds, opcode;
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uint32_t rel_addr;
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cmd->bits = 0;
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cmd->msg = 0;
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/* we have 21 bits of address max */
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addr &= ((1 << 21) - 1);
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/* cmd opcodes are variable length - SAME_AR is only two bits */
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opcode_bits = 3;
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if (check_same_address(master, id, addr)) {
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/* we still address the byte offset within the word */
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addr_bits = 2;
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opcode_bits = 2;
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opcode = FSI_CMD_SAME_AR;
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trace_fsi_master_gpio_cmd_same_addr(master);
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} else if (check_relative_address(master, id, addr, &rel_addr)) {
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/* 8 bits plus sign */
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addr_bits = 9;
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addr = rel_addr;
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opcode = FSI_CMD_REL_AR;
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trace_fsi_master_gpio_cmd_rel_addr(master, rel_addr);
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} else {
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addr_bits = 21;
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opcode = FSI_CMD_ABS_AR;
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trace_fsi_master_gpio_cmd_abs_addr(master, addr);
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}
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/*
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* The read/write size is encoded in the lower bits of the address
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* (as it must be naturally-aligned), and the following ds bit.
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*
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* size addr:1 addr:0 ds
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* 1 x x 0
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* 2 x 0 1
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* 4 0 1 1
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*
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*/
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ds = size > 1 ? 1 : 0;
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addr &= ~(size - 1);
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if (size == 4)
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addr |= 1;
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msg_push_bits(cmd, id, 2);
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msg_push_bits(cmd, opcode, opcode_bits);
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msg_push_bits(cmd, write ? 0 : 1, 1);
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msg_push_bits(cmd, addr, addr_bits);
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msg_push_bits(cmd, ds, 1);
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for (i = 0; write && i < size; i++)
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msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
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msg_push_crc(cmd);
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}
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static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
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{
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cmd->bits = 0;
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cmd->msg = 0;
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msg_push_bits(cmd, slave_id, 2);
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msg_push_bits(cmd, FSI_CMD_DPOLL, 3);
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msg_push_crc(cmd);
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}
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static void build_epoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
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{
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cmd->bits = 0;
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cmd->msg = 0;
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msg_push_bits(cmd, slave_id, 2);
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msg_push_bits(cmd, FSI_CMD_EPOLL, 3);
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msg_push_crc(cmd);
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}
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static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
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{
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cmd->bits = 0;
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cmd->msg = 0;
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msg_push_bits(cmd, slave_id, 2);
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msg_push_bits(cmd, FSI_CMD_TERM, 6);
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msg_push_crc(cmd);
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}
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/*
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* Note: callers rely specifically on this returning -EAGAIN for
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* a CRC error detected in the response. Use other error code
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* for other situations. It will be converted to something else
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* higher up the stack before it reaches userspace.
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*/
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static int read_one_response(struct fsi_master_gpio *master,
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uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp)
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{
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struct fsi_gpio_msg msg;
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unsigned long flags;
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uint32_t crc;
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uint8_t tag;
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int i;
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local_irq_save(flags);
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/* wait for the start bit */
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for (i = 0; i < FSI_MASTER_MTOE_COUNT; i++) {
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msg.bits = 0;
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msg.msg = 0;
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serial_in(master, &msg, 1);
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if (msg.msg)
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break;
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}
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if (i == FSI_MASTER_MTOE_COUNT) {
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dev_dbg(master->dev,
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"Master time out waiting for response\n");
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local_irq_restore(flags);
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return -ETIMEDOUT;
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}
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msg.bits = 0;
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msg.msg = 0;
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/* Read slave ID & response tag */
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serial_in(master, &msg, 4);
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tag = msg.msg & 0x3;
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/* If we have an ACK and we're expecting data, clock the data in too */
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if (tag == FSI_RESP_ACK && data_size)
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serial_in(master, &msg, data_size * 8);
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/* read CRC */
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serial_in(master, &msg, FSI_CRC_SIZE);
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local_irq_restore(flags);
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/* we have a whole message now; check CRC */
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crc = crc4(0, 1, 1);
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crc = crc4(crc, msg.msg, msg.bits);
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if (crc) {
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/* Check if it's all 1's, that probably means the host is off */
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if (((~msg.msg) & ((1ull << msg.bits) - 1)) == 0)
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return -ENODEV;
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dev_dbg(master->dev, "ERR response CRC msg: 0x%016llx (%d bits)\n",
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msg.msg, msg.bits);
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return -EAGAIN;
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}
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if (msgp)
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*msgp = msg;
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if (tagp)
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*tagp = tag;
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return 0;
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}
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static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
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{
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struct fsi_gpio_msg cmd;
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unsigned long flags;
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uint8_t tag;
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int rc;
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build_term_command(&cmd, slave);
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local_irq_save(flags);
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serial_out(master, &cmd);
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echo_delay(master);
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local_irq_restore(flags);
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rc = read_one_response(master, 0, NULL, &tag);
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if (rc < 0) {
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dev_err(master->dev,
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"TERM failed; lost communication with slave\n");
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return -EIO;
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} else if (tag != FSI_RESP_ACK) {
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dev_err(master->dev, "TERM failed; response %d\n", tag);
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return -EIO;
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}
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return 0;
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}
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static int poll_for_response(struct fsi_master_gpio *master,
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uint8_t slave, uint8_t size, void *data)
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{
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struct fsi_gpio_msg response, cmd;
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int busy_count = 0, rc, i;
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unsigned long flags;
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uint8_t tag;
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uint8_t *data_byte = data;
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int crc_err_retries = 0;
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retry:
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rc = read_one_response(master, size, &response, &tag);
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/* Handle retries on CRC errors */
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if (rc == -EAGAIN) {
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/* Too many retries ? */
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if (crc_err_retries++ > FSI_CRC_ERR_RETRIES) {
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/*
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* Pass it up as a -EIO otherwise upper level will retry
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* the whole command which isn't what we want here.
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*/
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rc = -EIO;
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goto fail;
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}
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dev_dbg(master->dev,
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"CRC error retry %d\n", crc_err_retries);
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trace_fsi_master_gpio_crc_rsp_error(master);
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build_epoll_command(&cmd, slave);
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local_irq_save(flags);
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clock_zeros(master, FSI_MASTER_EPOLL_CLOCKS);
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serial_out(master, &cmd);
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echo_delay(master);
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local_irq_restore(flags);
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goto retry;
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} else if (rc)
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goto fail;
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switch (tag) {
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case FSI_RESP_ACK:
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if (size && data) {
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uint64_t val = response.msg;
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/* clear crc & mask */
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val >>= 4;
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val &= (1ull << (size * 8)) - 1;
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for (i = 0; i < size; i++) {
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data_byte[size-i-1] = val;
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val >>= 8;
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}
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}
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break;
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case FSI_RESP_BUSY:
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/*
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* Its necessary to clock slave before issuing
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* d-poll, not indicated in the hardware protocol
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* spec. < 20 clocks causes slave to hang, 21 ok.
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*/
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if (busy_count++ < FSI_MASTER_MAX_BUSY) {
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build_dpoll_command(&cmd, slave);
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local_irq_save(flags);
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clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
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serial_out(master, &cmd);
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echo_delay(master);
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local_irq_restore(flags);
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goto retry;
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}
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dev_warn(master->dev,
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"ERR slave is stuck in busy state, issuing TERM\n");
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local_irq_save(flags);
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clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
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local_irq_restore(flags);
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issue_term(master, slave);
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rc = -EIO;
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break;
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case FSI_RESP_ERRA:
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dev_dbg(master->dev, "ERRA received: 0x%x\n", (int)response.msg);
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rc = -EIO;
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break;
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case FSI_RESP_ERRC:
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dev_dbg(master->dev, "ERRC received: 0x%x\n", (int)response.msg);
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trace_fsi_master_gpio_crc_cmd_error(master);
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rc = -EAGAIN;
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break;
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}
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if (busy_count > 0)
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trace_fsi_master_gpio_poll_response_busy(master, busy_count);
|
|
fail:
|
|
/*
|
|
* tSendDelay clocks, avoids signal reflections when switching
|
|
* from receive of response back to send of data.
|
|
*/
|
|
local_irq_save(flags);
|
|
clock_zeros(master, master->t_send_delay);
|
|
local_irq_restore(flags);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int send_request(struct fsi_master_gpio *master,
|
|
struct fsi_gpio_msg *cmd)
|
|
{
|
|
unsigned long flags;
|
|
|
|
if (master->external_mode)
|
|
return -EBUSY;
|
|
|
|
local_irq_save(flags);
|
|
serial_out(master, cmd);
|
|
echo_delay(master);
|
|
local_irq_restore(flags);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave,
|
|
struct fsi_gpio_msg *cmd, size_t resp_len, void *resp)
|
|
{
|
|
int rc = -EAGAIN, retries = 0;
|
|
|
|
while ((retries++) < FSI_CRC_ERR_RETRIES) {
|
|
rc = send_request(master, cmd);
|
|
if (rc)
|
|
break;
|
|
rc = poll_for_response(master, slave, resp_len, resp);
|
|
if (rc != -EAGAIN)
|
|
break;
|
|
rc = -EIO;
|
|
dev_warn(master->dev, "ECRC retry %d\n", retries);
|
|
|
|
/* Pace it a bit before retry */
|
|
msleep(1);
|
|
}
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int fsi_master_gpio_read(struct fsi_master *_master, int link,
|
|
uint8_t id, uint32_t addr, void *val, size_t size)
|
|
{
|
|
struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
|
|
struct fsi_gpio_msg cmd;
|
|
int rc;
|
|
|
|
if (link != 0)
|
|
return -ENODEV;
|
|
|
|
mutex_lock(&master->cmd_lock);
|
|
build_ar_command(master, &cmd, id, addr, size, NULL);
|
|
rc = fsi_master_gpio_xfer(master, id, &cmd, size, val);
|
|
last_address_update(master, id, rc == 0, addr);
|
|
mutex_unlock(&master->cmd_lock);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int fsi_master_gpio_write(struct fsi_master *_master, int link,
|
|
uint8_t id, uint32_t addr, const void *val, size_t size)
|
|
{
|
|
struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
|
|
struct fsi_gpio_msg cmd;
|
|
int rc;
|
|
|
|
if (link != 0)
|
|
return -ENODEV;
|
|
|
|
mutex_lock(&master->cmd_lock);
|
|
build_ar_command(master, &cmd, id, addr, size, val);
|
|
rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
|
|
last_address_update(master, id, rc == 0, addr);
|
|
mutex_unlock(&master->cmd_lock);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int fsi_master_gpio_term(struct fsi_master *_master,
|
|
int link, uint8_t id)
|
|
{
|
|
struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
|
|
struct fsi_gpio_msg cmd;
|
|
int rc;
|
|
|
|
if (link != 0)
|
|
return -ENODEV;
|
|
|
|
mutex_lock(&master->cmd_lock);
|
|
build_term_command(&cmd, id);
|
|
rc = fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
|
|
last_address_update(master, id, false, 0);
|
|
mutex_unlock(&master->cmd_lock);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int fsi_master_gpio_break(struct fsi_master *_master, int link)
|
|
{
|
|
struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
|
|
unsigned long flags;
|
|
|
|
if (link != 0)
|
|
return -ENODEV;
|
|
|
|
trace_fsi_master_gpio_break(master);
|
|
|
|
mutex_lock(&master->cmd_lock);
|
|
if (master->external_mode) {
|
|
mutex_unlock(&master->cmd_lock);
|
|
return -EBUSY;
|
|
}
|
|
|
|
local_irq_save(flags);
|
|
|
|
set_sda_output(master, 1);
|
|
sda_out(master, 1);
|
|
clock_toggle(master, FSI_PRE_BREAK_CLOCKS);
|
|
sda_out(master, 0);
|
|
clock_toggle(master, FSI_BREAK_CLOCKS);
|
|
echo_delay(master);
|
|
sda_out(master, 1);
|
|
clock_toggle(master, FSI_POST_BREAK_CLOCKS);
|
|
|
|
local_irq_restore(flags);
|
|
|
|
last_address_update(master, 0, false, 0);
|
|
mutex_unlock(&master->cmd_lock);
|
|
|
|
/* Wait for logic reset to take effect */
|
|
udelay(200);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void fsi_master_gpio_init(struct fsi_master_gpio *master)
|
|
{
|
|
unsigned long flags;
|
|
|
|
gpiod_direction_output(master->gpio_mux, 1);
|
|
gpiod_direction_output(master->gpio_trans, 1);
|
|
gpiod_direction_output(master->gpio_enable, 1);
|
|
gpiod_direction_output(master->gpio_clk, 1);
|
|
gpiod_direction_output(master->gpio_data, 1);
|
|
|
|
/* todo: evaluate if clocks can be reduced */
|
|
local_irq_save(flags);
|
|
clock_zeros(master, FSI_INIT_CLOCKS);
|
|
local_irq_restore(flags);
|
|
}
|
|
|
|
static void fsi_master_gpio_init_external(struct fsi_master_gpio *master)
|
|
{
|
|
gpiod_direction_output(master->gpio_mux, 0);
|
|
gpiod_direction_output(master->gpio_trans, 0);
|
|
gpiod_direction_output(master->gpio_enable, 1);
|
|
gpiod_direction_input(master->gpio_clk);
|
|
gpiod_direction_input(master->gpio_data);
|
|
}
|
|
|
|
static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link,
|
|
bool enable)
|
|
{
|
|
struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
|
|
int rc = -EBUSY;
|
|
|
|
if (link != 0)
|
|
return -ENODEV;
|
|
|
|
mutex_lock(&master->cmd_lock);
|
|
if (!master->external_mode) {
|
|
gpiod_set_value(master->gpio_enable, enable ? 1 : 0);
|
|
rc = 0;
|
|
}
|
|
mutex_unlock(&master->cmd_lock);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static int fsi_master_gpio_link_config(struct fsi_master *_master, int link,
|
|
u8 t_send_delay, u8 t_echo_delay)
|
|
{
|
|
struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
|
|
|
|
if (link != 0)
|
|
return -ENODEV;
|
|
|
|
mutex_lock(&master->cmd_lock);
|
|
master->t_send_delay = t_send_delay;
|
|
master->t_echo_delay = t_echo_delay;
|
|
mutex_unlock(&master->cmd_lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t external_mode_show(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
struct fsi_master_gpio *master = dev_get_drvdata(dev);
|
|
|
|
return snprintf(buf, PAGE_SIZE - 1, "%u\n",
|
|
master->external_mode ? 1 : 0);
|
|
}
|
|
|
|
static ssize_t external_mode_store(struct device *dev,
|
|
struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
struct fsi_master_gpio *master = dev_get_drvdata(dev);
|
|
unsigned long val;
|
|
bool external_mode;
|
|
int err;
|
|
|
|
err = kstrtoul(buf, 0, &val);
|
|
if (err)
|
|
return err;
|
|
|
|
external_mode = !!val;
|
|
|
|
mutex_lock(&master->cmd_lock);
|
|
|
|
if (external_mode == master->external_mode) {
|
|
mutex_unlock(&master->cmd_lock);
|
|
return count;
|
|
}
|
|
|
|
master->external_mode = external_mode;
|
|
if (master->external_mode)
|
|
fsi_master_gpio_init_external(master);
|
|
else
|
|
fsi_master_gpio_init(master);
|
|
|
|
mutex_unlock(&master->cmd_lock);
|
|
|
|
fsi_master_rescan(&master->master);
|
|
|
|
return count;
|
|
}
|
|
|
|
static DEVICE_ATTR(external_mode, 0664,
|
|
external_mode_show, external_mode_store);
|
|
|
|
static void fsi_master_gpio_release(struct device *dev)
|
|
{
|
|
struct fsi_master_gpio *master = to_fsi_master_gpio(dev_to_fsi_master(dev));
|
|
|
|
of_node_put(dev_of_node(master->dev));
|
|
|
|
kfree(master);
|
|
}
|
|
|
|
static int fsi_master_gpio_probe(struct platform_device *pdev)
|
|
{
|
|
struct fsi_master_gpio *master;
|
|
struct gpio_desc *gpio;
|
|
int rc;
|
|
|
|
master = kzalloc(sizeof(*master), GFP_KERNEL);
|
|
if (!master)
|
|
return -ENOMEM;
|
|
|
|
master->dev = &pdev->dev;
|
|
master->master.dev.parent = master->dev;
|
|
master->master.dev.of_node = of_node_get(dev_of_node(master->dev));
|
|
master->master.dev.release = fsi_master_gpio_release;
|
|
master->last_addr = LAST_ADDR_INVALID;
|
|
|
|
gpio = devm_gpiod_get(&pdev->dev, "clock", 0);
|
|
if (IS_ERR(gpio)) {
|
|
dev_err(&pdev->dev, "failed to get clock gpio\n");
|
|
rc = PTR_ERR(gpio);
|
|
goto err_free;
|
|
}
|
|
master->gpio_clk = gpio;
|
|
|
|
gpio = devm_gpiod_get(&pdev->dev, "data", 0);
|
|
if (IS_ERR(gpio)) {
|
|
dev_err(&pdev->dev, "failed to get data gpio\n");
|
|
rc = PTR_ERR(gpio);
|
|
goto err_free;
|
|
}
|
|
master->gpio_data = gpio;
|
|
|
|
/* Optional GPIOs */
|
|
gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0);
|
|
if (IS_ERR(gpio)) {
|
|
dev_err(&pdev->dev, "failed to get trans gpio\n");
|
|
rc = PTR_ERR(gpio);
|
|
goto err_free;
|
|
}
|
|
master->gpio_trans = gpio;
|
|
|
|
gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0);
|
|
if (IS_ERR(gpio)) {
|
|
dev_err(&pdev->dev, "failed to get enable gpio\n");
|
|
rc = PTR_ERR(gpio);
|
|
goto err_free;
|
|
}
|
|
master->gpio_enable = gpio;
|
|
|
|
gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0);
|
|
if (IS_ERR(gpio)) {
|
|
dev_err(&pdev->dev, "failed to get mux gpio\n");
|
|
rc = PTR_ERR(gpio);
|
|
goto err_free;
|
|
}
|
|
master->gpio_mux = gpio;
|
|
|
|
/*
|
|
* Check if GPIO block is slow enought that no extra delays
|
|
* are necessary. This improves performance on ast2500 by
|
|
* an order of magnitude.
|
|
*/
|
|
master->no_delays = device_property_present(&pdev->dev, "no-gpio-delays");
|
|
|
|
/* Default FSI command delays */
|
|
master->t_send_delay = FSI_SEND_DELAY_CLOCKS;
|
|
master->t_echo_delay = FSI_ECHO_DELAY_CLOCKS;
|
|
|
|
master->master.n_links = 1;
|
|
master->master.flags = FSI_MASTER_FLAG_SWCLOCK;
|
|
master->master.read = fsi_master_gpio_read;
|
|
master->master.write = fsi_master_gpio_write;
|
|
master->master.term = fsi_master_gpio_term;
|
|
master->master.send_break = fsi_master_gpio_break;
|
|
master->master.link_enable = fsi_master_gpio_link_enable;
|
|
master->master.link_config = fsi_master_gpio_link_config;
|
|
platform_set_drvdata(pdev, master);
|
|
mutex_init(&master->cmd_lock);
|
|
|
|
fsi_master_gpio_init(master);
|
|
|
|
rc = device_create_file(&pdev->dev, &dev_attr_external_mode);
|
|
if (rc)
|
|
goto err_free;
|
|
|
|
rc = fsi_master_register(&master->master);
|
|
if (rc) {
|
|
device_remove_file(&pdev->dev, &dev_attr_external_mode);
|
|
put_device(&master->master.dev);
|
|
return rc;
|
|
}
|
|
return 0;
|
|
err_free:
|
|
kfree(master);
|
|
return rc;
|
|
}
|
|
|
|
|
|
|
|
static int fsi_master_gpio_remove(struct platform_device *pdev)
|
|
{
|
|
struct fsi_master_gpio *master = platform_get_drvdata(pdev);
|
|
|
|
device_remove_file(&pdev->dev, &dev_attr_external_mode);
|
|
|
|
fsi_master_unregister(&master->master);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id fsi_master_gpio_match[] = {
|
|
{ .compatible = "fsi-master-gpio" },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, fsi_master_gpio_match);
|
|
|
|
static struct platform_driver fsi_master_gpio_driver = {
|
|
.driver = {
|
|
.name = "fsi-master-gpio",
|
|
.of_match_table = fsi_master_gpio_match,
|
|
},
|
|
.probe = fsi_master_gpio_probe,
|
|
.remove = fsi_master_gpio_remove,
|
|
};
|
|
|
|
module_platform_driver(fsi_master_gpio_driver);
|
|
MODULE_LICENSE("GPL");
|