Christophe JAILLET 986b509470 soc/tegra: Fix an error handling path in tegra_powergate_power_up() ... If an error occurs after a successful tegra_powergate_enable_clocks() call, it must be undone by a tegra_powergate_disable_clocks() call, as already done in the below and above error handling paths of this function. Update the 'goto' to branch at the correct place of the error handling path. Fixes: a38045121b ("soc/tegra: pmc: Add generic PM domain support") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2021-10-07 20:01:54 +02:00
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fuse	soc/tegra: fuse: Enable fuse clock on suspend for Tegra124	2021-08-11 11:55:56 +02:00
common.c	soc/tegra: Add devm_tegra_core_dev_init_opp_table()	2021-06-01 12:14:59 +02:00
flowctrl.c	remove ioremap_nocache and devm_ioremap_nocache	2020-01-06 09:45:59 +01:00
Kconfig	soc/tegra: Make regulator couplers depend on CONFIG_REGULATOR	2021-08-02 14:30:46 +02:00
Makefile	soc/tegra: regulators: Add regulators coupler for Tegra30	2019-10-29 14:02:59 +01:00
pmc.c	soc/tegra: Fix an error handling path in tegra_powergate_power_up()	2021-10-07 20:01:54 +02:00
powergate-bpmp.c	soc/tegra: bpmp: Remove unused including <linux/version.h>	2021-08-11 11:51:39 +02:00
regulators-tegra20.c	soc/tegra: regulators: Support core domain state syncing	2021-06-02 10:58:55 +02:00
regulators-tegra30.c	soc/tegra: regulators: Support core domain state syncing	2021-06-02 10:58:55 +02:00