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c8c06f5a0d
Set memory coherence always on hash64 config. If a platform cannot have memory coherence always set they can infer that from _PAGE_NO_CACHE and _PAGE_WRITETHRU like in lpar. So we dont' really need a separate bit for tracking _PAGE_COHERENCE. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
180 lines
4.9 KiB
C
180 lines
4.9 KiB
C
/*
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* Copyright IBM Corporation, 2013
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* Author Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2.1 of the GNU Lesser General Public License
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it would be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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*
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*/
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/*
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* PPC64 THP Support for hash based MMUs
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*/
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#include <linux/mm.h>
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#include <asm/machdep.h>
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int __hash_page_thp(unsigned long ea, unsigned long access, unsigned long vsid,
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pmd_t *pmdp, unsigned long trap, int local, int ssize,
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unsigned int psize)
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{
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unsigned int index, valid;
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unsigned char *hpte_slot_array;
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unsigned long rflags, pa, hidx;
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unsigned long old_pmd, new_pmd;
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int ret, lpsize = MMU_PAGE_16M;
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unsigned long vpn, hash, shift, slot;
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/*
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* atomically mark the linux large page PMD busy and dirty
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*/
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do {
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old_pmd = pmd_val(*pmdp);
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/* If PMD busy, retry the access */
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if (unlikely(old_pmd & _PAGE_BUSY))
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return 0;
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/* If PMD is trans splitting retry the access */
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if (unlikely(old_pmd & _PAGE_SPLITTING))
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return 0;
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/* If PMD permissions don't match, take page fault */
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if (unlikely(access & ~old_pmd))
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return 1;
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/*
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* Try to lock the PTE, add ACCESSED and DIRTY if it was
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* a write access
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*/
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new_pmd = old_pmd | _PAGE_BUSY | _PAGE_ACCESSED;
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if (access & _PAGE_RW)
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new_pmd |= _PAGE_DIRTY;
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} while (old_pmd != __cmpxchg_u64((unsigned long *)pmdp,
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old_pmd, new_pmd));
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/*
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* PP bits. _PAGE_USER is already PP bit 0x2, so we only
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* need to add in 0x1 if it's a read-only user page
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*/
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rflags = new_pmd & _PAGE_USER;
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if ((new_pmd & _PAGE_USER) && !((new_pmd & _PAGE_RW) &&
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(new_pmd & _PAGE_DIRTY)))
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rflags |= 0x1;
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/*
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* _PAGE_EXEC -> HW_NO_EXEC since it's inverted
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*/
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rflags |= ((new_pmd & _PAGE_EXEC) ? 0 : HPTE_R_N);
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#if 0
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if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) {
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/*
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* No CPU has hugepages but lacks no execute, so we
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* don't need to worry about that case
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*/
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rflags = hash_page_do_lazy_icache(rflags, __pte(old_pte), trap);
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}
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#endif
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/*
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* Find the slot index details for this ea, using base page size.
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*/
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shift = mmu_psize_defs[psize].shift;
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index = (ea & ~HPAGE_PMD_MASK) >> shift;
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BUG_ON(index >= 4096);
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vpn = hpt_vpn(ea, vsid, ssize);
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hash = hpt_hash(vpn, shift, ssize);
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hpte_slot_array = get_hpte_slot_array(pmdp);
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valid = hpte_valid(hpte_slot_array, index);
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if (valid) {
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/* update the hpte bits */
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hidx = hpte_hash_index(hpte_slot_array, index);
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if (hidx & _PTEIDX_SECONDARY)
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hash = ~hash;
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slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
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slot += hidx & _PTEIDX_GROUP_IX;
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ret = ppc_md.hpte_updatepp(slot, rflags, vpn,
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psize, lpsize, ssize, local);
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/*
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* We failed to update, try to insert a new entry.
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*/
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if (ret == -1) {
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/*
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* large pte is marked busy, so we can be sure
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* nobody is looking at hpte_slot_array. hence we can
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* safely update this here.
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*/
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valid = 0;
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new_pmd &= ~_PAGE_HPTEFLAGS;
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hpte_slot_array[index] = 0;
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} else
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/* clear the busy bits and set the hash pte bits */
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new_pmd = (new_pmd & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
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}
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if (!valid) {
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unsigned long hpte_group;
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/* insert new entry */
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pa = pmd_pfn(__pmd(old_pmd)) << PAGE_SHIFT;
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repeat:
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hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL;
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/* clear the busy bits and set the hash pte bits */
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new_pmd = (new_pmd & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
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/* Add in WIMG bits */
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rflags |= (new_pmd & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
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_PAGE_GUARDED));
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/*
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* enable the memory coherence always
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*/
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rflags |= HPTE_R_M;
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/* Insert into the hash table, primary slot */
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slot = ppc_md.hpte_insert(hpte_group, vpn, pa, rflags, 0,
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psize, lpsize, ssize);
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/*
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* Primary is full, try the secondary
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*/
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if (unlikely(slot == -1)) {
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hpte_group = ((~hash & htab_hash_mask) *
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HPTES_PER_GROUP) & ~0x7UL;
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slot = ppc_md.hpte_insert(hpte_group, vpn, pa,
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rflags, HPTE_V_SECONDARY,
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psize, lpsize, ssize);
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if (slot == -1) {
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if (mftb() & 0x1)
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hpte_group = ((hash & htab_hash_mask) *
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HPTES_PER_GROUP) & ~0x7UL;
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ppc_md.hpte_remove(hpte_group);
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goto repeat;
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}
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}
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/*
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* Hypervisor failure. Restore old pmd and return -1
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* similar to __hash_page_*
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*/
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if (unlikely(slot == -2)) {
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*pmdp = __pmd(old_pmd);
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hash_failure_debug(ea, access, vsid, trap, ssize,
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psize, lpsize, old_pmd);
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return -1;
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}
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/*
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* large pte is marked busy, so we can be sure
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* nobody is looking at hpte_slot_array. hence we can
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* safely update this here.
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*/
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mark_hpte_slot_valid(hpte_slot_array, index, slot);
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}
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/*
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* No need to use ldarx/stdcx here
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*/
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*pmdp = __pmd(new_pmd & ~_PAGE_BUSY);
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return 0;
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}
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