linux/arch/arm64/Kconfig.platforms
Linus Torvalds 6bfd2d442a Updates for the interrupt subsystem:
- Core code:
 
    - Interrupt storm detection for the lockup watchdog:
 
      Lockups which are caused by interrupt storms are not easy to debug
      because there is no information about the events which make the lockup
      detector trigger.
 
      To make this more user friendly, provide an extenstion to interrupt
      statistics which allows to take snapshots and an interface to retrieve
      the delta to the snapshot. Use this new mechanism in the watchdog code
      to do a two stage lockup analysis by taking the snapshot and printing
      the deltas for the topmost active interrupts on the second trigger.
 
      Note: This contains both the interrupt and the watchdog changes as
      the latter depend on the former obviously.
 
   - Avoid summation loops in the /proc/interrupts output and use the global
     counter when possible
 
   - Skip suspended interrupts on CPU hotplug operations to ensure that they
     are not delivered before the system resumes the device drivers when
     coming out of suspend.
 
   - On CPU hot-unplug interrupts which are affine to the outgoing CPU are
     migrated to a different CPU in the affinity mask. This can fail when
     the CPUs have no vectors left. Instead of giving up try to migrate it
     to any online CPU and thereby breaking the affinity setting in order to
     prevent a stale device interrupt which targets an offline CPU
 
   - The usual small cleanups
 
  - Driver code:
 
   - Support for the RISCV AIA MSI controller
 
   - Make the interrupt allocation for the Loongson PCH controller more
     flexible to prevent vector exhaustion
 
   - The usual set of cleanups and fixes all over the place
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Merge tag 'irq-core-2024-05-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull interrupt subsystem updates from Thomas Gleixner:
 "Core code:

   - Interrupt storm detection for the lockup watchdog:

     Lockups which are caused by interrupt storms are not easy to debug
     because there is no information about the events which make the
     lockup detector trigger.

     To make this more user friendly, provide an extenstion to interrupt
     statistics which allows to take snapshots and an interface to
     retrieve the delta to the snapshot. Use this new mechanism in the
     watchdog code to do a two stage lockup analysis by taking the
     snapshot and printing the deltas for the topmost active interrupts
     on the second trigger.

     Note: This contains both the interrupt and the watchdog changes as
     the latter depend on the former obviously.

   - Avoid summation loops in the /proc/interrupts output and use the
     global counter when possible

   - Skip suspended interrupts on CPU hotplug operations to ensure that
     they are not delivered before the system resumes the device drivers
     when coming out of suspend.

   - On CPU hot-unplug interrupts which are affine to the outgoing CPU
     are migrated to a different CPU in the affinity mask. This can fail
     when the CPUs have no vectors left. Instead of giving up try to
     migrate it to any online CPU and thereby breaking the affinity
     setting in order to prevent a stale device interrupt which targets
     an offline CPU

   - The usual small cleanups

  Driver code:

   - Support for the RISCV AIA MSI controller

   - Make the interrupt allocation for the Loongson PCH controller more
     flexible to prevent vector exhaustion

   - The usual set of cleanups and fixes all over the place"

* tag 'irq-core-2024-05-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (51 commits)
  irqchip/gic-v3-its: Remove BUG_ON in its_vpe_irq_domain_alloc
  cpuidle: Avoid explicit cpumask allocation on stack
  irqchip/sifive-plic: Avoid explicit cpumask allocation on stack
  irqchip/riscv-aplic-direct: Avoid explicit cpumask allocation on stack
  irqchip/loongson-eiointc: Avoid explicit cpumask allocation on stack
  irqchip/gic-v3-its: Avoid explicit cpumask allocation on stack
  irqchip/irq-bcm6345-l1: Avoid explicit cpumask allocation on stack
  cpumask: Introduce cpumask_first_and_and()
  irqchip/irq-brcmstb-l2: Avoid saving mask on shutdown
  genirq: Reuse irq_is_nmi()
  genirq/cpuhotplug: Retry with cpu_online_mask when migration fails
  genirq/cpuhotplug: Skip suspended interrupts when restoring affinity
  arm64: dts: st: Add interrupt parent to pinctrl on stm32mp251
  arm64: dts: st: Add exti1 and exti2 nodes on stm32mp251
  ARM: dts: stm32: List exti parent interrupts on stm32mp131
  ARM: dts: stm32: List exti parent interrupts on stm32mp151
  arm64: Kconfig.platforms: Enable STM32_EXTI for ARCH_STM32
  irqchip/stm32-exti: Mark events reserved with RIF configuration check
  irqchip/stm32-exti: Skip secure events
  irqchip/stm32-exti: Convert driver to standard PM
  ...
2024-05-14 09:47:14 -07:00

399 lines
9.3 KiB
Plaintext

# SPDX-License-Identifier: GPL-2.0-only
menu "Platform selection"
config ARCH_ACTIONS
bool "Actions Semi Platforms"
select OWL_TIMER
select PINCTRL
help
This enables support for the Actions Semiconductor S900 SoC family.
config ARCH_AIROHA
bool "Airoha SoC Support"
select ARM_PSCI
select HAVE_ARM_ARCH_TIMER
help
This enables support for the ARM64 based Airoha SoCs.
config ARCH_SUNXI
bool "Allwinner sunxi 64-bit SoC Family"
select ARCH_HAS_RESET_CONTROLLER
select PINCTRL
select RESET_CONTROLLER
select SUN4I_TIMER
select SUN6I_R_INTC
select SUNXI_NMI_INTC
help
This enables support for Allwinner sunxi based SoCs like the A64.
config ARCH_ALPINE
bool "Annapurna Labs Alpine platform"
select ALPINE_MSI if PCI
help
This enables support for the Annapurna Labs Alpine
Soc family.
config ARCH_APPLE
bool "Apple Silicon SoC family"
select APPLE_AIC
help
This enables support for Apple's in-house ARM SoC family, starting
with the Apple M1.
menuconfig ARCH_BCM
bool "Broadcom SoC Support"
if ARCH_BCM
config ARCH_BCM2835
bool "Broadcom BCM2835 family"
select TIMER_OF
select GPIOLIB
select MFD_CORE
select PINCTRL
select PINCTRL_BCM2835
select ARM_AMBA
select ARM_GIC
select ARM_TIMER_SP804
help
This enables support for the Broadcom BCM2837 and BCM2711 SoC.
These SoCs are used in the Raspberry Pi 3 and 4 devices.
config ARCH_BCM_IPROC
bool "Broadcom iProc SoC Family"
select COMMON_CLK_IPROC
select GPIOLIB
select PINCTRL
help
This enables support for Broadcom iProc based SoCs
config ARCH_BCMBCA
bool "Broadcom Broadband Carrier Access (BCA) origin SoC"
select GPIOLIB
help
Say Y if you intend to run the kernel on a Broadcom Broadband ARM-based
BCA chipset.
This enables support for Broadcom BCA ARM-based broadband chipsets,
including the DSL, PON and Wireless family of chips.
config ARCH_BRCMSTB
bool "Broadcom Set-Top-Box SoCs"
select ARCH_HAS_RESET_CONTROLLER
select GENERIC_IRQ_CHIP
select PINCTRL
help
This enables support for Broadcom's ARMv8 Set Top Box SoCs
endif
config ARCH_BERLIN
bool "Marvell Berlin SoC Family"
select DW_APB_ICTL
select DW_APB_TIMER_OF
select GPIOLIB
select PINCTRL
help
This enables support for Marvell Berlin SoC Family
config ARCH_BITMAIN
bool "Bitmain SoC Platforms"
help
This enables support for the Bitmain SoC Family.
config ARCH_EXYNOS
bool "Samsung Exynos SoC family"
select COMMON_CLK_SAMSUNG
select CLKSRC_EXYNOS_MCT
select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS
select EXYNOS_PMU
select PINCTRL
select PINCTRL_EXYNOS
select PM_GENERIC_DOMAINS if PM
select SOC_SAMSUNG
help
This enables support for ARMv8 based Samsung Exynos SoC family.
config ARCH_SPARX5
bool "Microchip Sparx5 SoC family"
select PINCTRL
select DW_APB_TIMER_OF
help
This enables support for the Microchip Sparx5 ARMv8-based
SoC family of TSN-capable gigabit switches.
The SparX-5 Ethernet switch family provides a rich set of
switching features such as advanced TCAM-based VLAN and QoS
processing enabling delivery of differentiated services, and
security through TCAM-based frame processing using versatile
content aware processor (VCAP).
config ARCH_K3
bool "Texas Instruments Inc. K3 multicore SoC architecture"
select PM_GENERIC_DOMAINS if PM
select MAILBOX
select SOC_TI
select TI_MESSAGE_MANAGER
select TI_SCI_PROTOCOL
select TI_SCI_INTR_IRQCHIP
select TI_SCI_INTA_IRQCHIP
select TI_K3_SOCINFO
help
This enables support for Texas Instruments' K3 multicore SoC
architecture.
config ARCH_LG1K
bool "LG Electronics LG1K SoC Family"
help
This enables support for LG Electronics LG1K SoC Family
config ARCH_HISI
bool "Hisilicon SoC Family"
select ARM_TIMER_SP804
select HISILICON_IRQ_MBIGEN if PCI
select PINCTRL
help
This enables support for Hisilicon ARMv8 SoC family
config ARCH_KEEMBAY
bool "Keem Bay SoC"
help
This enables support for Intel Movidius SoC code-named Keem Bay.
config ARCH_MEDIATEK
bool "MediaTek SoC Family"
select ARM_GIC
select PINCTRL
select MTK_TIMER
help
This enables support for MediaTek MT27xx, MT65xx, MT76xx
& MT81xx ARMv8 SoCs
config ARCH_MESON
bool "Amlogic Platforms"
help
This enables support for the arm64 based Amlogic SoCs
such as the s905, S905X/D, S912, A113X/D or S905X/D2
config ARCH_MVEBU
bool "Marvell EBU SoC Family"
select ARMADA_AP806_SYSCON
select ARMADA_CP110_SYSCON
select ARMADA_37XX_CLK
select GPIOLIB
select GPIOLIB_IRQCHIP
select MVEBU_GICP
select MVEBU_ICU
select MVEBU_ODMI
select MVEBU_PIC
select MVEBU_SEI
select OF_GPIO
select PINCTRL
select PINCTRL_ARMADA_37XX
select PINCTRL_ARMADA_AP806
select PINCTRL_ARMADA_CP110
select PINCTRL_AC5
help
This enables support for Marvell EBU family, including:
- Armada 3700 SoC Family
- Armada 7K SoC Family
- Armada 8K SoC Family
- 98DX2530 SoC Family
menuconfig ARCH_NXP
bool "NXP SoC support"
if ARCH_NXP
config ARCH_LAYERSCAPE
bool "Freescale Layerscape SoC family"
select EDAC_SUPPORT
help
This enables support for the Freescale Layerscape SoC family.
config ARCH_MXC
bool "NXP i.MX SoC family"
select ARM64_ERRATUM_843419
select ARM64_ERRATUM_845719 if COMPAT
select IMX_GPCV2
select IMX_GPCV2_PM_DOMAINS
select PM
select PM_GENERIC_DOMAINS
select SOC_BUS
select TIMER_IMX_SYS_CTR
help
This enables support for the ARMv8 based SoCs in the
NXP i.MX family.
config ARCH_S32
bool "NXP S32 SoC Family"
help
This enables support for the NXP S32 family of processors.
endif
config ARCH_MA35
bool "Nuvoton MA35 Architecture"
select GPIOLIB
select PINCTRL
select RESET_CONTROLLER
help
This enables support for the ARMv8 based Nuvoton MA35 series SoCs.
config ARCH_NPCM
bool "Nuvoton NPCM Architecture"
select PINCTRL
select GPIOLIB
select NPCM7XX_TIMER
select RESET_CONTROLLER
select MFD_SYSCON
help
General support for NPCM8xx BMC (Arbel).
Nuvoton NPCM8xx BMC based on the Cortex A35.
config ARCH_PENSANDO
bool "AMD Pensando Platforms"
help
This enables support for the ARMv8 based AMD Pensando SoC
family to include the Elba SoC.
AMD Pensando SoCs support a range of Distributed Services
Cards in PCIe format installed into servers. The Elba
SoC includes 16 Cortex A-72 CPU cores, 144 P4-programmable
cores for a minimal latency/jitter datapath, and network
interfaces up to 200 Gb/s.
config ARCH_QCOM
bool "Qualcomm Platforms"
select GPIOLIB
select PINCTRL
help
This enables support for the ARMv8 based Qualcomm chipsets.
config ARCH_REALTEK
bool "Realtek Platforms"
select RESET_CONTROLLER
help
This enables support for the ARMv8 based Realtek chipsets,
like the RTD1295.
config ARCH_RENESAS
bool "Renesas SoC Platforms"
help
This enables support for the ARMv8 based Renesas SoCs.
config ARCH_ROCKCHIP
bool "Rockchip Platforms"
select ARCH_HAS_RESET_CONTROLLER
select PINCTRL
select PM
select ROCKCHIP_TIMER
help
This enables support for the ARMv8 based Rockchip chipsets,
like the RK3368.
config ARCH_SEATTLE
bool "AMD Seattle SoC Family"
help
This enables support for AMD Seattle SOC Family
config ARCH_INTEL_SOCFPGA
bool "Intel's SoCFPGA ARMv8 Families"
help
This enables support for Intel's SoCFPGA ARMv8 families:
Stratix 10 (ex. Altera), Stratix10 Software Virtual Platform,
Agilex and eASIC N5X.
config ARCH_STM32
bool "STMicroelectronics STM32 SoC Family"
select GPIOLIB
select PINCTRL
select PINCTRL_STM32MP257
select STM32_EXTI
select ARM_SMC_MBOX
select ARM_SCMI_PROTOCOL
select COMMON_CLK_SCMI
select STM32_FIREWALL
help
This enables support for ARMv8 based STMicroelectronics
STM32 family, including:
- STM32MP25:
- STM32MP251, STM32MP253, STM32MP255 and STM32MP257.
config ARCH_SYNQUACER
bool "Socionext SynQuacer SoC Family"
select IRQ_FASTEOI_HIERARCHY_HANDLERS
config ARCH_TEGRA
bool "NVIDIA Tegra SoC Family"
select ARCH_HAS_RESET_CONTROLLER
select ARM_GIC_PM
select CLKSRC_MMIO
select TIMER_OF
select GPIOLIB
select PINCTRL
select PM
select PM_GENERIC_DOMAINS
select RESET_CONTROLLER
help
This enables support for the NVIDIA Tegra SoC family.
config ARCH_TESLA_FSD
bool "Tesla platform"
depends on ARCH_EXYNOS
help
Support for ARMv8 based Tesla platforms.
config ARCH_SPRD
bool "Spreadtrum SoC platform"
help
Support for Spreadtrum ARM based SoCs
config ARCH_THUNDER
bool "Cavium Inc. Thunder SoC Family"
help
This enables support for Cavium's Thunder Family of SoCs.
config ARCH_THUNDER2
bool "Cavium ThunderX2 Server Processors"
select GPIOLIB
help
This enables support for Cavium's ThunderX2 CN99XX family of
server processors.
config ARCH_UNIPHIER
bool "Socionext UniPhier SoC Family"
select ARCH_HAS_RESET_CONTROLLER
select PINCTRL
select RESET_CONTROLLER
help
This enables support for Socionext UniPhier SoC family.
config ARCH_VEXPRESS
bool "ARMv8 software model (Versatile Express)"
select GPIOLIB
select PM
select PM_GENERIC_DOMAINS
help
This enables support for the ARMv8 software model (Versatile
Express).
config ARCH_VISCONTI
bool "Toshiba Visconti SoC Family"
select PINCTRL
select PINCTRL_VISCONTI
help
This enables support for Toshiba Visconti SoCs Family.
config ARCH_XGENE
bool "AppliedMicro X-Gene SOC Family"
help
This enables support for AppliedMicro X-Gene SOC Family
config ARCH_ZYNQMP
bool "Xilinx ZynqMP Family"
help
This enables support for Xilinx ZynqMP Family
endmenu # "Platform selection"