linux/arch/arm/include/asm/hardware/cache-tauros2.h
Chao Xie 38f2e37724 ARM: cache: add extra feature enable for tauros2
The extra feature may be used by SOCs are prefetch, burst8,
write buffer coalesce

Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-08-16 16:16:27 +08:00

15 lines
441 B
C

/*
* arch/arm/include/asm/hardware/cache-tauros2.h
*
* Copyright (C) 2008 Marvell Semiconductor
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
#define CACHE_TAUROS2_PREFETCH_ON (1 << 0)
#define CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1)
extern void __init tauros2_init(unsigned int features);