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4ed10958ae
Trying to get clock for CPU cores on SMP systems I found that I was only able to get clock for core[0]. That was because only one cpu@0 node was represented in ARC HS device tree and it was impossible to get clock for "non-existing" cores. So as ARC HS may have up to 4 cores we update device tree to match maximum possible cores quantity. Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
65 lines
1.2 KiB
Plaintext
65 lines
1.2 KiB
Plaintext
/*
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* Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/ {
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compatible = "snps,arc";
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#address-cells = <1>;
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#size-cells = <1>;
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chosen { };
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aliases { };
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "snps,archs38";
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reg = <0>;
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clocks = <&core_clk>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "snps,archs38";
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reg = <1>;
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clocks = <&core_clk>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "snps,archs38";
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reg = <2>;
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clocks = <&core_clk>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "snps,archs38";
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reg = <3>;
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clocks = <&core_clk>;
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};
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};
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/* TIMER0 with interrupt for clockevent */
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timer0 {
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compatible = "snps,arc-timer";
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interrupts = <16>;
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interrupt-parent = <&core_intc>;
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clocks = <&core_clk>;
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};
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/* 64-bit Global Free Running Counter */
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gfrc {
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compatible = "snps,archs-timer-gfrc";
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clocks = <&core_clk>;
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256M */
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};
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};
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