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d82f3e3cd8
remove inclusion of "core.h" from all glue layers as they don't need to know details about the core IP. Signed-off-by: Felipe Balbi <balbi@ti.com>
205 lines
4.5 KiB
C
205 lines
4.5 KiB
C
/**
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* dwc3-exynos.c - Samsung EXYNOS DWC3 Specific Glue layer
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* Author: Anton Tikhomirov <av.tikhomirov@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/dwc3-exynos.h>
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#include <linux/dma-mapping.h>
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#include <linux/clk.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/nop-usb-xceiv.h>
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#include <linux/of.h>
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struct dwc3_exynos {
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struct platform_device *dwc3;
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struct platform_device *usb2_phy;
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struct platform_device *usb3_phy;
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struct device *dev;
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struct clk *clk;
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};
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static int dwc3_exynos_register_phys(struct dwc3_exynos *exynos)
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{
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struct nop_usb_xceiv_platform_data pdata;
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struct platform_device *pdev;
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int ret;
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memset(&pdata, 0x00, sizeof(pdata));
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pdev = platform_device_alloc("nop_usb_xceiv", PLATFORM_DEVID_AUTO);
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if (!pdev)
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return -ENOMEM;
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exynos->usb2_phy = pdev;
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pdata.type = USB_PHY_TYPE_USB2;
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ret = platform_device_add_data(exynos->usb2_phy, &pdata, sizeof(pdata));
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if (ret)
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goto err1;
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pdev = platform_device_alloc("nop_usb_xceiv", PLATFORM_DEVID_AUTO);
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if (!pdev) {
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ret = -ENOMEM;
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goto err1;
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}
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exynos->usb3_phy = pdev;
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pdata.type = USB_PHY_TYPE_USB3;
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ret = platform_device_add_data(exynos->usb3_phy, &pdata, sizeof(pdata));
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if (ret)
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goto err2;
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ret = platform_device_add(exynos->usb2_phy);
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if (ret)
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goto err2;
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ret = platform_device_add(exynos->usb3_phy);
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if (ret)
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goto err3;
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return 0;
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err3:
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platform_device_del(exynos->usb2_phy);
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err2:
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platform_device_put(exynos->usb3_phy);
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err1:
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platform_device_put(exynos->usb2_phy);
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return ret;
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}
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static u64 dwc3_exynos_dma_mask = DMA_BIT_MASK(32);
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static int dwc3_exynos_probe(struct platform_device *pdev)
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{
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struct platform_device *dwc3;
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struct dwc3_exynos *exynos;
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struct clk *clk;
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struct device *dev = &pdev->dev;
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int ret = -ENOMEM;
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exynos = devm_kzalloc(dev, sizeof(*exynos), GFP_KERNEL);
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if (!exynos) {
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dev_err(dev, "not enough memory\n");
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return -ENOMEM;
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}
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/*
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* Right now device-tree probed devices don't get dma_mask set.
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* Since shared usb code relies on it, set it here for now.
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* Once we move to full device tree support this will vanish off.
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*/
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if (!pdev->dev.dma_mask)
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pdev->dev.dma_mask = &dwc3_exynos_dma_mask;
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platform_set_drvdata(pdev, exynos);
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ret = dwc3_exynos_register_phys(exynos);
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if (ret) {
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dev_err(dev, "couldn't register PHYs\n");
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return ret;
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}
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dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO);
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if (!dwc3) {
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dev_err(dev, "couldn't allocate dwc3 device\n");
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return -ENOMEM;
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}
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clk = devm_clk_get(dev, "usbdrd30");
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if (IS_ERR(clk)) {
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dev_err(dev, "couldn't get clock\n");
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ret = -EINVAL;
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goto err1;
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}
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dma_set_coherent_mask(&dwc3->dev, dev->coherent_dma_mask);
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dwc3->dev.parent = dev;
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dwc3->dev.dma_mask = dev->dma_mask;
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dwc3->dev.dma_parms = dev->dma_parms;
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exynos->dwc3 = dwc3;
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exynos->dev = dev;
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exynos->clk = clk;
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clk_enable(exynos->clk);
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ret = platform_device_add_resources(dwc3, pdev->resource,
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pdev->num_resources);
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if (ret) {
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dev_err(dev, "couldn't add resources to dwc3 device\n");
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goto err2;
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}
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ret = platform_device_add(dwc3);
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if (ret) {
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dev_err(dev, "failed to register dwc3 device\n");
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goto err2;
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}
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return 0;
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err2:
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clk_disable(clk);
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err1:
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platform_device_put(dwc3);
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return ret;
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}
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static int dwc3_exynos_remove(struct platform_device *pdev)
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{
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struct dwc3_exynos *exynos = platform_get_drvdata(pdev);
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platform_device_unregister(exynos->dwc3);
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platform_device_unregister(exynos->usb2_phy);
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platform_device_unregister(exynos->usb3_phy);
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clk_disable(exynos->clk);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id exynos_dwc3_match[] = {
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{ .compatible = "samsung,exynos5250-dwusb3" },
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{},
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};
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MODULE_DEVICE_TABLE(of, exynos_dwc3_match);
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#endif
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static struct platform_driver dwc3_exynos_driver = {
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.probe = dwc3_exynos_probe,
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.remove = dwc3_exynos_remove,
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.driver = {
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.name = "exynos-dwc3",
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.of_match_table = of_match_ptr(exynos_dwc3_match),
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},
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};
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module_platform_driver(dwc3_exynos_driver);
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MODULE_ALIAS("platform:exynos-dwc3");
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MODULE_AUTHOR("Anton Tikhomirov <av.tikhomirov@samsung.com>");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("DesignWare USB3 EXYNOS Glue Layer");
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