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* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (44 commits) vlynq: make whole Kconfig-menu dependant on architecture add descriptive comment for TIF_MEMDIE task flag declaration. EEPROM: max6875: Header file cleanup EEPROM: 93cx6: Header file cleanup EEPROM: Header file cleanup agp: use NULL instead of 0 when pointer is needed rtc-v3020: make bitfield unsigned PCI: make bitfield unsigned jbd2: use NULL instead of 0 when pointer is needed cciss: fix shadows sparse warning doc: inode uses a mutex instead of a semaphore. uml: i386: Avoid redefinition of NR_syscalls fix "seperate" typos in comments cocbalt_lcdfb: correct sections doc: Change urls for sparse Powerpc: wii: Fix typo in comment i2o: cleanup some exit paths Documentation/: it's -> its where appropriate UML: Fix compiler warning due to missing task_struct declaration UML: add kernel.h include to signal.c ...
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213 lines
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Plaintext
Intel(R) TXT Overview:
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=====================
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Intel's technology for safer computing, Intel(R) Trusted Execution
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Technology (Intel(R) TXT), defines platform-level enhancements that
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provide the building blocks for creating trusted platforms.
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Intel TXT was formerly known by the code name LaGrande Technology (LT).
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Intel TXT in Brief:
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o Provides dynamic root of trust for measurement (DRTM)
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o Data protection in case of improper shutdown
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o Measurement and verification of launched environment
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Intel TXT is part of the vPro(TM) brand and is also available some
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non-vPro systems. It is currently available on desktop systems
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based on the Q35, X38, Q45, and Q43 Express chipsets (e.g. Dell
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Optiplex 755, HP dc7800, etc.) and mobile systems based on the GM45,
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PM45, and GS45 Express chipsets.
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For more information, see http://www.intel.com/technology/security/.
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This site also has a link to the Intel TXT MLE Developers Manual,
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which has been updated for the new released platforms.
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Intel TXT has been presented at various events over the past few
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years, some of which are:
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LinuxTAG 2008:
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http://www.linuxtag.org/2008/en/conf/events/vp-donnerstag/
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details.html?talkid=110
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TRUST2008:
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http://www.trust2008.eu/downloads/Keynote-Speakers/
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3_David-Grawrock_The-Front-Door-of-Trusted-Computing.pdf
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IDF 2008, Shanghai:
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http://inteldeveloperforum.com.edgesuite.net/shanghai_2008/
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aep/PROS003/index.html
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IDFs 2006, 2007 (I'm not sure if/where they are online)
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Trusted Boot Project Overview:
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=============================
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Trusted Boot (tboot) is an open source, pre- kernel/VMM module that
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uses Intel TXT to perform a measured and verified launch of an OS
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kernel/VMM.
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It is hosted on SourceForge at http://sourceforge.net/projects/tboot.
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The mercurial source repo is available at http://www.bughost.org/
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repos.hg/tboot.hg.
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Tboot currently supports launching Xen (open source VMM/hypervisor
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w/ TXT support since v3.2), and now Linux kernels.
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Value Proposition for Linux or "Why should you care?"
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=====================================================
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While there are many products and technologies that attempt to
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measure or protect the integrity of a running kernel, they all
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assume the kernel is "good" to begin with. The Integrity
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Measurement Architecture (IMA) and Linux Integrity Module interface
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are examples of such solutions.
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To get trust in the initial kernel without using Intel TXT, a
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static root of trust must be used. This bases trust in BIOS
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starting at system reset and requires measurement of all code
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executed between system reset through the completion of the kernel
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boot as well as data objects used by that code. In the case of a
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Linux kernel, this means all of BIOS, any option ROMs, the
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bootloader and the boot config. In practice, this is a lot of
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code/data, much of which is subject to change from boot to boot
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(e.g. changing NICs may change option ROMs). Without reference
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hashes, these measurement changes are difficult to assess or
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confirm as benign. This process also does not provide DMA
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protection, memory configuration/alias checks and locks, crash
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protection, or policy support.
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By using the hardware-based root of trust that Intel TXT provides,
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many of these issues can be mitigated. Specifically: many
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pre-launch components can be removed from the trust chain, DMA
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protection is provided to all launched components, a large number
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of platform configuration checks are performed and values locked,
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protection is provided for any data in the event of an improper
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shutdown, and there is support for policy-based execution/verification.
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This provides a more stable measurement and a higher assurance of
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system configuration and initial state than would be otherwise
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possible. Since the tboot project is open source, source code for
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almost all parts of the trust chain is available (excepting SMM and
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Intel-provided firmware).
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How Does it Work?
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=================
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o Tboot is an executable that is launched by the bootloader as
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the "kernel" (the binary the bootloader executes).
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o It performs all of the work necessary to determine if the
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platform supports Intel TXT and, if so, executes the GETSEC[SENTER]
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processor instruction that initiates the dynamic root of trust.
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- If tboot determines that the system does not support Intel TXT
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or is not configured correctly (e.g. the SINIT AC Module was
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incorrect), it will directly launch the kernel with no changes
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to any state.
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- Tboot will output various information about its progress to the
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terminal, serial port, and/or an in-memory log; the output
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locations can be configured with a command line switch.
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o The GETSEC[SENTER] instruction will return control to tboot and
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tboot then verifies certain aspects of the environment (e.g. TPM NV
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lock, e820 table does not have invalid entries, etc.).
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o It will wake the APs from the special sleep state the GETSEC[SENTER]
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instruction had put them in and place them into a wait-for-SIPI
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state.
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- Because the processors will not respond to an INIT or SIPI when
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in the TXT environment, it is necessary to create a small VT-x
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guest for the APs. When they run in this guest, they will
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simply wait for the INIT-SIPI-SIPI sequence, which will cause
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VMEXITs, and then disable VT and jump to the SIPI vector. This
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approach seemed like a better choice than having to insert
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special code into the kernel's MP wakeup sequence.
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o Tboot then applies an (optional) user-defined launch policy to
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verify the kernel and initrd.
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- This policy is rooted in TPM NV and is described in the tboot
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project. The tboot project also contains code for tools to
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create and provision the policy.
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- Policies are completely under user control and if not present
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then any kernel will be launched.
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- Policy action is flexible and can include halting on failures
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or simply logging them and continuing.
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o Tboot adjusts the e820 table provided by the bootloader to reserve
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its own location in memory as well as to reserve certain other
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TXT-related regions.
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o As part of its launch, tboot DMA protects all of RAM (using the
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VT-d PMRs). Thus, the kernel must be booted with 'intel_iommu=on'
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in order to remove this blanket protection and use VT-d's
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page-level protection.
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o Tboot will populate a shared page with some data about itself and
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pass this to the Linux kernel as it transfers control.
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- The location of the shared page is passed via the boot_params
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struct as a physical address.
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o The kernel will look for the tboot shared page address and, if it
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exists, map it.
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o As one of the checks/protections provided by TXT, it makes a copy
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of the VT-d DMARs in a DMA-protected region of memory and verifies
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them for correctness. The VT-d code will detect if the kernel was
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launched with tboot and use this copy instead of the one in the
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ACPI table.
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o At this point, tboot and TXT are out of the picture until a
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shutdown (S<n>)
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o In order to put a system into any of the sleep states after a TXT
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launch, TXT must first be exited. This is to prevent attacks that
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attempt to crash the system to gain control on reboot and steal
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data left in memory.
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- The kernel will perform all of its sleep preparation and
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populate the shared page with the ACPI data needed to put the
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platform in the desired sleep state.
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- Then the kernel jumps into tboot via the vector specified in the
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shared page.
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- Tboot will clean up the environment and disable TXT, then use the
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kernel-provided ACPI information to actually place the platform
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into the desired sleep state.
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- In the case of S3, tboot will also register itself as the resume
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vector. This is necessary because it must re-establish the
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measured environment upon resume. Once the TXT environment
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has been restored, it will restore the TPM PCRs and then
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transfer control back to the kernel's S3 resume vector.
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In order to preserve system integrity across S3, the kernel
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provides tboot with a set of memory ranges (RAM and RESERVED_KERN
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in the e820 table, but not any memory that BIOS might alter over
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the S3 transition) that tboot will calculate a MAC (message
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authentication code) over and then seal with the TPM. On resume
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and once the measured environment has been re-established, tboot
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will re-calculate the MAC and verify it against the sealed value.
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Tboot's policy determines what happens if the verification fails.
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Note that the c/s 194 of tboot which has the new MAC code supports
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this.
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That's pretty much it for TXT support.
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Configuring the System:
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======================
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This code works with 32bit, 32bit PAE, and 64bit (x86_64) kernels.
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In BIOS, the user must enable: TPM, TXT, VT-x, VT-d. Not all BIOSes
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allow these to be individually enabled/disabled and the screens in
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which to find them are BIOS-specific.
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grub.conf needs to be modified as follows:
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title Linux 2.6.29-tip w/ tboot
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root (hd0,0)
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kernel /tboot.gz logging=serial,vga,memory
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module /vmlinuz-2.6.29-tip intel_iommu=on ro
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root=LABEL=/ rhgb console=ttyS0,115200 3
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module /initrd-2.6.29-tip.img
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module /Q35_SINIT_17.BIN
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The kernel option for enabling Intel TXT support is found under the
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Security top-level menu and is called "Enable Intel(R) Trusted
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Execution Technology (TXT)". It is marked as EXPERIMENTAL and
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depends on the generic x86 support (to allow maximum flexibility in
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kernel build options), since the tboot code will detect whether the
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platform actually supports Intel TXT and thus whether any of the
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kernel code is executed.
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The Q35_SINIT_17.BIN file is what Intel TXT refers to as an
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Authenticated Code Module. It is specific to the chipset in the
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system and can also be found on the Trusted Boot site. It is an
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(unencrypted) module signed by Intel that is used as part of the
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DRTM process to verify and configure the system. It is signed
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because it operates at a higher privilege level in the system than
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any other macrocode and its correct operation is critical to the
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establishment of the DRTM. The process for determining the correct
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SINIT ACM for a system is documented in the SINIT-guide.txt file
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that is on the tboot SourceForge site under the SINIT ACM downloads.
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