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6514f81e1b
commit914d6f44fc
("RISC-V: only iterate over possible CPUs in ISA string parser") changed riscv_fill_hwcap() from iterating over CPU DT nodes to iterating over logical CPU IDs. Since this function runs long before cpu_dev_init() creates CPU devices, it hits the fallback path in of_cpu_device_node_get(), which itself iterates over the DT nodes, searching for a node with the requested CPU ID. (Incidentally, this makes riscv_fill_hwcap() now take quadratic time.) riscv_fill_hwcap() passes a logical CPU ID to of_cpu_device_node_get(), which uses the arch_match_cpu_phys_id() hook to translate the logical ID to a physical ID as found in the DT. arch_match_cpu_phys_id() has a generic weak definition, and RISC-V provides a strong definition using cpuid_to_hartid_map(). However, the RISC-V specific implementation is located in arch/riscv/kernel/smp.c, and that file is only compiled when SMP is enabled. As a result, when SMP is disabled, the generic definition is used, and riscv_isa gets initialized based on the ISA string of hart 0, not the boot hart. On FU740, this means has_fpu() returns false, and userspace crashes when trying to use floating-point instructions. Fix this by moving arch_match_cpu_phys_id() to a file which is always compiled. Fixes:70114560b2
("RISC-V: Add RISC-V specific arch_match_cpu_phys_id") Fixes:914d6f44fc
("RISC-V: only iterate over possible CPUs in ISA string parser") Reported-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230803012608.3540081-1-samuel.holland@sifive.com Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
335 lines
7.1 KiB
C
335 lines
7.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* SMP initialisation and IPI support
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* Based on arch/arm64/kernel/smp.c
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*
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* Copyright (C) 2012 ARM Ltd.
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* Copyright (C) 2015 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*/
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#include <linux/cpu.h>
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/kexec.h>
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#include <linux/percpu.h>
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#include <linux/profile.h>
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#include <linux/smp.h>
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/irq_work.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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#include <asm/cpu_ops.h>
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enum ipi_message_type {
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IPI_RESCHEDULE,
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IPI_CALL_FUNC,
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IPI_CPU_STOP,
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IPI_CPU_CRASH_STOP,
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IPI_IRQ_WORK,
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IPI_TIMER,
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IPI_MAX
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};
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unsigned long __cpuid_to_hartid_map[NR_CPUS] __ro_after_init = {
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[0 ... NR_CPUS-1] = INVALID_HARTID
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};
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void __init smp_setup_processor_id(void)
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{
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cpuid_to_hartid_map(0) = boot_cpu_hartid;
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}
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static DEFINE_PER_CPU_READ_MOSTLY(int, ipi_dummy_dev);
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static int ipi_virq_base __ro_after_init;
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static int nr_ipi __ro_after_init = IPI_MAX;
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static struct irq_desc *ipi_desc[IPI_MAX] __read_mostly;
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int riscv_hartid_to_cpuid(unsigned long hartid)
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{
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int i;
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for (i = 0; i < NR_CPUS; i++)
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if (cpuid_to_hartid_map(i) == hartid)
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return i;
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return -ENOENT;
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}
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static void ipi_stop(void)
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{
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set_cpu_online(smp_processor_id(), false);
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while (1)
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wait_for_interrupt();
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}
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#ifdef CONFIG_KEXEC_CORE
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static atomic_t waiting_for_crash_ipi = ATOMIC_INIT(0);
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static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
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{
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crash_save_cpu(regs, cpu);
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atomic_dec(&waiting_for_crash_ipi);
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local_irq_disable();
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#ifdef CONFIG_HOTPLUG_CPU
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if (cpu_has_hotplug(cpu))
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cpu_ops[cpu]->cpu_stop();
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#endif
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for(;;)
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wait_for_interrupt();
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}
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#else
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static inline void ipi_cpu_crash_stop(unsigned int cpu, struct pt_regs *regs)
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{
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unreachable();
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}
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#endif
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static void send_ipi_mask(const struct cpumask *mask, enum ipi_message_type op)
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{
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__ipi_send_mask(ipi_desc[op], mask);
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}
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static void send_ipi_single(int cpu, enum ipi_message_type op)
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{
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__ipi_send_mask(ipi_desc[op], cpumask_of(cpu));
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}
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#ifdef CONFIG_IRQ_WORK
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void arch_irq_work_raise(void)
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{
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send_ipi_single(smp_processor_id(), IPI_IRQ_WORK);
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}
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#endif
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static irqreturn_t handle_IPI(int irq, void *data)
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{
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int ipi = irq - ipi_virq_base;
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switch (ipi) {
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case IPI_RESCHEDULE:
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scheduler_ipi();
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break;
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case IPI_CALL_FUNC:
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generic_smp_call_function_interrupt();
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break;
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case IPI_CPU_STOP:
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ipi_stop();
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break;
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case IPI_CPU_CRASH_STOP:
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ipi_cpu_crash_stop(smp_processor_id(), get_irq_regs());
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break;
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case IPI_IRQ_WORK:
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irq_work_run();
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break;
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#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
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case IPI_TIMER:
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tick_receive_broadcast();
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break;
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#endif
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default:
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pr_warn("CPU%d: unhandled IPI%d\n", smp_processor_id(), ipi);
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break;
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}
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return IRQ_HANDLED;
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}
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void riscv_ipi_enable(void)
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{
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int i;
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if (WARN_ON_ONCE(!ipi_virq_base))
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return;
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for (i = 0; i < nr_ipi; i++)
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enable_percpu_irq(ipi_virq_base + i, 0);
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}
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void riscv_ipi_disable(void)
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{
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int i;
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if (WARN_ON_ONCE(!ipi_virq_base))
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return;
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for (i = 0; i < nr_ipi; i++)
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disable_percpu_irq(ipi_virq_base + i);
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}
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bool riscv_ipi_have_virq_range(void)
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{
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return (ipi_virq_base) ? true : false;
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}
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DEFINE_STATIC_KEY_FALSE(riscv_ipi_for_rfence);
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EXPORT_SYMBOL_GPL(riscv_ipi_for_rfence);
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void riscv_ipi_set_virq_range(int virq, int nr, bool use_for_rfence)
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{
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int i, err;
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if (WARN_ON(ipi_virq_base))
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return;
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WARN_ON(nr < IPI_MAX);
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nr_ipi = min(nr, IPI_MAX);
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ipi_virq_base = virq;
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/* Request IPIs */
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for (i = 0; i < nr_ipi; i++) {
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err = request_percpu_irq(ipi_virq_base + i, handle_IPI,
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"IPI", &ipi_dummy_dev);
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WARN_ON(err);
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ipi_desc[i] = irq_to_desc(ipi_virq_base + i);
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irq_set_status_flags(ipi_virq_base + i, IRQ_HIDDEN);
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}
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/* Enabled IPIs for boot CPU immediately */
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riscv_ipi_enable();
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/* Update RFENCE static key */
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if (use_for_rfence)
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static_branch_enable(&riscv_ipi_for_rfence);
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else
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static_branch_disable(&riscv_ipi_for_rfence);
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}
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static const char * const ipi_names[] = {
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[IPI_RESCHEDULE] = "Rescheduling interrupts",
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[IPI_CALL_FUNC] = "Function call interrupts",
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[IPI_CPU_STOP] = "CPU stop interrupts",
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[IPI_CPU_CRASH_STOP] = "CPU stop (for crash dump) interrupts",
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[IPI_IRQ_WORK] = "IRQ work interrupts",
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[IPI_TIMER] = "Timer broadcast interrupts",
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};
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void show_ipi_stats(struct seq_file *p, int prec)
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{
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unsigned int cpu, i;
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for (i = 0; i < IPI_MAX; i++) {
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seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i,
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prec >= 4 ? " " : "");
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for_each_online_cpu(cpu)
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seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
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seq_printf(p, " %s\n", ipi_names[i]);
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}
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}
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void arch_send_call_function_ipi_mask(struct cpumask *mask)
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{
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send_ipi_mask(mask, IPI_CALL_FUNC);
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}
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void arch_send_call_function_single_ipi(int cpu)
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{
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send_ipi_single(cpu, IPI_CALL_FUNC);
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}
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#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
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void tick_broadcast(const struct cpumask *mask)
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{
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send_ipi_mask(mask, IPI_TIMER);
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}
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#endif
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void smp_send_stop(void)
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{
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unsigned long timeout;
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if (num_online_cpus() > 1) {
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cpumask_t mask;
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cpumask_copy(&mask, cpu_online_mask);
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cpumask_clear_cpu(smp_processor_id(), &mask);
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if (system_state <= SYSTEM_RUNNING)
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pr_crit("SMP: stopping secondary CPUs\n");
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send_ipi_mask(&mask, IPI_CPU_STOP);
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}
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/* Wait up to one second for other CPUs to stop */
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timeout = USEC_PER_SEC;
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while (num_online_cpus() > 1 && timeout--)
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udelay(1);
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if (num_online_cpus() > 1)
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pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
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cpumask_pr_args(cpu_online_mask));
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}
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#ifdef CONFIG_KEXEC_CORE
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/*
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* The number of CPUs online, not counting this CPU (which may not be
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* fully online and so not counted in num_online_cpus()).
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*/
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static inline unsigned int num_other_online_cpus(void)
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{
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unsigned int this_cpu_online = cpu_online(smp_processor_id());
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return num_online_cpus() - this_cpu_online;
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}
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void crash_smp_send_stop(void)
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{
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static int cpus_stopped;
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cpumask_t mask;
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unsigned long timeout;
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/*
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* This function can be called twice in panic path, but obviously
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* we execute this only once.
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*/
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if (cpus_stopped)
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return;
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cpus_stopped = 1;
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/*
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* If this cpu is the only one alive at this point in time, online or
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* not, there are no stop messages to be sent around, so just back out.
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*/
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if (num_other_online_cpus() == 0)
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return;
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cpumask_copy(&mask, cpu_online_mask);
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cpumask_clear_cpu(smp_processor_id(), &mask);
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atomic_set(&waiting_for_crash_ipi, num_other_online_cpus());
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pr_crit("SMP: stopping secondary CPUs\n");
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send_ipi_mask(&mask, IPI_CPU_CRASH_STOP);
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/* Wait up to one second for other CPUs to stop */
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timeout = USEC_PER_SEC;
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while ((atomic_read(&waiting_for_crash_ipi) > 0) && timeout--)
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udelay(1);
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if (atomic_read(&waiting_for_crash_ipi) > 0)
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pr_warn("SMP: failed to stop secondary CPUs %*pbl\n",
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cpumask_pr_args(&mask));
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}
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bool smp_crash_stop_failed(void)
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{
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return (atomic_read(&waiting_for_crash_ipi) > 0);
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}
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#endif
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void arch_smp_send_reschedule(int cpu)
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{
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send_ipi_single(cpu, IPI_RESCHEDULE);
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}
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EXPORT_SYMBOL_GPL(arch_smp_send_reschedule);
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