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069fa0453f
Each call to the co-processor, with exception of the last call, needs to send data that is multiple of block size. As consequence, any remaining data is kept in the internal NX context. This patch fixes a bug in the driver that causes it to save incorrect data into the context when data is bigger than the block size. Reviewed-by: Joy Latten <jmlatten@linux.vnet.ibm.com> Signed-off-by: Marcelo Cerri <mhcerri@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
283 lines
8.3 KiB
C
283 lines
8.3 KiB
C
/**
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* SHA-256 routines supporting the Power 7+ Nest Accelerators driver
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*
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* Copyright (C) 2011-2012 International Business Machines Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 only.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Author: Kent Yoder <yoder1@us.ibm.com>
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*/
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#include <crypto/internal/hash.h>
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#include <crypto/sha.h>
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#include <linux/module.h>
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#include <asm/vio.h>
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#include "nx_csbcpb.h"
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#include "nx.h"
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static int nx_sha256_init(struct shash_desc *desc)
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{
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struct sha256_state *sctx = shash_desc_ctx(desc);
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
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struct nx_sg *out_sg;
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nx_ctx_init(nx_ctx, HCOP_FC_SHA);
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memset(sctx, 0, sizeof *sctx);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_SHA256];
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NX_CPB_SET_DIGEST_SIZE(nx_ctx->csbcpb, NX_DS_SHA256);
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out_sg = nx_build_sg_list(nx_ctx->out_sg, (u8 *)sctx->state,
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SHA256_DIGEST_SIZE, nx_ctx->ap->sglen);
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nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
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return 0;
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}
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static int nx_sha256_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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struct sha256_state *sctx = shash_desc_ctx(desc);
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
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struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
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struct nx_sg *in_sg;
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u64 to_process, leftover, total;
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u32 max_sg_len;
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unsigned long irq_flags;
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int rc = 0;
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spin_lock_irqsave(&nx_ctx->lock, irq_flags);
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/* 2 cases for total data len:
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* 1: < SHA256_BLOCK_SIZE: copy into state, return 0
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* 2: >= SHA256_BLOCK_SIZE: process X blocks, copy in leftover
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*/
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total = sctx->count + len;
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if (total < SHA256_BLOCK_SIZE) {
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memcpy(sctx->buf + sctx->count, data, len);
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sctx->count += len;
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goto out;
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}
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in_sg = nx_ctx->in_sg;
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max_sg_len = min_t(u32, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
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nx_ctx->ap->sglen);
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do {
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/*
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* to_process: the SHA256_BLOCK_SIZE data chunk to process in
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* this update. This value is also restricted by the sg list
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* limits.
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*/
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to_process = min_t(u64, total, nx_ctx->ap->databytelen);
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to_process = min_t(u64, to_process,
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NX_PAGE_SIZE * (max_sg_len - 1));
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to_process = to_process & ~(SHA256_BLOCK_SIZE - 1);
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leftover = total - to_process;
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if (sctx->count) {
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in_sg = nx_build_sg_list(nx_ctx->in_sg,
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(u8 *) sctx->buf,
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sctx->count, max_sg_len);
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}
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in_sg = nx_build_sg_list(in_sg, (u8 *) data,
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to_process - sctx->count,
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max_sg_len);
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nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) *
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sizeof(struct nx_sg);
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if (NX_CPB_FDM(csbcpb) & NX_FDM_CONTINUATION) {
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/*
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* we've hit the nx chip previously and we're updating
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* again, so copy over the partial digest.
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*/
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memcpy(csbcpb->cpb.sha256.input_partial_digest,
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csbcpb->cpb.sha256.message_digest,
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SHA256_DIGEST_SIZE);
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}
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NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
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if (!nx_ctx->op.inlen || !nx_ctx->op.outlen) {
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rc = -EINVAL;
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goto out;
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}
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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goto out;
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atomic_inc(&(nx_ctx->stats->sha256_ops));
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csbcpb->cpb.sha256.message_bit_length += (u64)
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(csbcpb->cpb.sha256.spbc * 8);
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/* everything after the first update is continuation */
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NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
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total -= to_process;
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data += to_process - sctx->count;
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sctx->count = 0;
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in_sg = nx_ctx->in_sg;
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} while (leftover >= SHA256_BLOCK_SIZE);
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/* copy the leftover back into the state struct */
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if (leftover)
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memcpy(sctx->buf, data, leftover);
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sctx->count = leftover;
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out:
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spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
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return rc;
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}
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static int nx_sha256_final(struct shash_desc *desc, u8 *out)
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{
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struct sha256_state *sctx = shash_desc_ctx(desc);
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
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struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
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struct nx_sg *in_sg, *out_sg;
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u32 max_sg_len;
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unsigned long irq_flags;
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int rc;
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spin_lock_irqsave(&nx_ctx->lock, irq_flags);
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max_sg_len = min_t(u32, nx_driver.of.max_sg_len, nx_ctx->ap->sglen);
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if (NX_CPB_FDM(csbcpb) & NX_FDM_CONTINUATION) {
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/* we've hit the nx chip previously, now we're finalizing,
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* so copy over the partial digest */
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memcpy(csbcpb->cpb.sha256.input_partial_digest,
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csbcpb->cpb.sha256.message_digest, SHA256_DIGEST_SIZE);
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}
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/* final is represented by continuing the operation and indicating that
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* this is not an intermediate operation */
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
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csbcpb->cpb.sha256.message_bit_length += (u64)(sctx->count * 8);
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in_sg = nx_build_sg_list(nx_ctx->in_sg, (u8 *)sctx->buf,
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sctx->count, max_sg_len);
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out_sg = nx_build_sg_list(nx_ctx->out_sg, out, SHA256_DIGEST_SIZE,
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max_sg_len);
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nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
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nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
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if (!nx_ctx->op.outlen) {
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rc = -EINVAL;
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goto out;
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}
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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goto out;
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atomic_inc(&(nx_ctx->stats->sha256_ops));
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atomic64_add(csbcpb->cpb.sha256.message_bit_length / 8,
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&(nx_ctx->stats->sha256_bytes));
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memcpy(out, csbcpb->cpb.sha256.message_digest, SHA256_DIGEST_SIZE);
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out:
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spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
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return rc;
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}
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static int nx_sha256_export(struct shash_desc *desc, void *out)
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{
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struct sha256_state *sctx = shash_desc_ctx(desc);
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
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struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
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struct sha256_state *octx = out;
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unsigned long irq_flags;
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spin_lock_irqsave(&nx_ctx->lock, irq_flags);
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octx->count = sctx->count +
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(csbcpb->cpb.sha256.message_bit_length / 8);
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memcpy(octx->buf, sctx->buf, sizeof(octx->buf));
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/* if no data has been processed yet, we need to export SHA256's
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* initial data, in case this context gets imported into a software
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* context */
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if (csbcpb->cpb.sha256.message_bit_length)
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memcpy(octx->state, csbcpb->cpb.sha256.message_digest,
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SHA256_DIGEST_SIZE);
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else {
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octx->state[0] = SHA256_H0;
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octx->state[1] = SHA256_H1;
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octx->state[2] = SHA256_H2;
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octx->state[3] = SHA256_H3;
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octx->state[4] = SHA256_H4;
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octx->state[5] = SHA256_H5;
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octx->state[6] = SHA256_H6;
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octx->state[7] = SHA256_H7;
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}
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spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
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return 0;
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}
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static int nx_sha256_import(struct shash_desc *desc, const void *in)
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{
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struct sha256_state *sctx = shash_desc_ctx(desc);
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&desc->tfm->base);
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struct nx_csbcpb *csbcpb = (struct nx_csbcpb *)nx_ctx->csbcpb;
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const struct sha256_state *ictx = in;
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unsigned long irq_flags;
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spin_lock_irqsave(&nx_ctx->lock, irq_flags);
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memcpy(sctx->buf, ictx->buf, sizeof(ictx->buf));
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sctx->count = ictx->count & 0x3f;
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csbcpb->cpb.sha256.message_bit_length = (ictx->count & ~0x3f) * 8;
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if (csbcpb->cpb.sha256.message_bit_length) {
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memcpy(csbcpb->cpb.sha256.message_digest, ictx->state,
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SHA256_DIGEST_SIZE);
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NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
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NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
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}
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spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
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return 0;
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}
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struct shash_alg nx_shash_sha256_alg = {
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.digestsize = SHA256_DIGEST_SIZE,
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.init = nx_sha256_init,
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.update = nx_sha256_update,
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.final = nx_sha256_final,
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.export = nx_sha256_export,
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.import = nx_sha256_import,
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.descsize = sizeof(struct sha256_state),
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.statesize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha256",
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.cra_driver_name = "sha256-nx",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_TYPE_SHASH,
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.cra_blocksize = SHA256_BLOCK_SIZE,
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.cra_module = THIS_MODULE,
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.cra_ctxsize = sizeof(struct nx_crypto_ctx),
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.cra_init = nx_crypto_ctx_sha_init,
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.cra_exit = nx_crypto_ctx_exit,
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}
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};
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