Linus Torvalds 991f173cd2 RISC-V Fixes for 6.1-rc5 ... * A fix to add the missing PWM LEDs into the SiFive HiFive Unleashed device tree. * A fix to fully clear a task's registers on creation, as they end up in userspace and thus leak kernel memory. * A pair of VDSO-related build fixes that manifest on recent LLVM-based toolchains. * A fix to our early init to ensure the DT is adequately processed before reserved memory nodes are processed. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEKzw3R0RoQ7JKlDp6LhMZ81+7GIkFAmNuex4THHBhbG1lckBk YWJiZWx0LmNvbQAKCRAuExnzX7sYiUm5D/94ElBfEEH1Si2qwzfk5Vwxap0Jsjwj BA7GHito1P22P4yHlvXnMyPvjnl3f0/Cc7Q6O5+J8HvnR9FWeu97s84oBJU/Thkt D9pd68nknY/HPZ1P5eb4gzBUwo2D6WWn4ISk2uoa8XAJ9EKfhylnYbn32rzyRerj p8HFT1lP71mryLCr0FsxEOdqtBl7+41/Htd/jxEA+lwJtHJ3F3Yk+TnaeCzebGjT kg5vwTzNwgkl7o4rlLsBv3d/Oz8kvLZh7V9qsZ9Ta//ZNpCGw0PMOwzxCKSYS6C0 ZK342BRThsqxAjc2y1QtKOzFBPzEECzbgSSixFiEVXY4qpDY4ZlojXEOxRLevMjl KpLJL4e3wXpfyknZXLeIPIh0tFzHnuWrgliBVwa5CO4hYXhxWRY+qzh6LTqypx/W ewvuQ1auxmFFB6U6RHEXWuUv5mtzymXVT8lcHltpGcpGvxcbvnSw9SYtXTM6Sz5d DzEtEpgCZTx9MEp981FJ+uMYs4mGtURRDqqKZzeLOiBmXe8r7wfqnTIyosW1/f8V aXYJB90yMX5QvVJPKJHocphaKbNl75ywF8z0JSdnilO8CKJMJ6elJ9KleiJGJGFc zFWyFVPt18Eg+w+r4vMGmH2tz+hlaaZ+sOOGFExeM7KRU18WhP4MMVLgJiaLtoul UUX63X1wx7S2JA== =EHH7 -----END PGP SIGNATURE----- Merge tag 'riscv-for-linus-6.1-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - A fix to add the missing PWM LEDs into the SiFive HiFive Unleashed device tree. - A fix to fully clear a task's registers on creation, as they end up in userspace and thus leak kernel memory. - A pair of VDSO-related build fixes that manifest on recent LLVM-based toolchains. - A fix to our early init to ensure the DT is adequately processed before reserved memory nodes are processed. * tag 'riscv-for-linus-6.1-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: RISC-V: vdso: Do not add missing symbols to version section in linker script riscv: fix reserved memory setup riscv: vdso: fix build with llvm riscv: process: fix kernel info leakage riscv: dts: sifive unleashed: Add PWM controlled LEDs		2022-11-11 09:40:19 -08:00
..
cacheflush.c	RISC-V: Fix compilation without RISCV_ISA_ZICBOM	2022-10-21 11:52:39 +05:30
context.c	riscv: Implement sv48 support	2022-01-19 17:54:09 -08:00
dma-noncoherent.c	RISC-V: Fix compilation without RISCV_ISA_ZICBOM	2022-10-21 11:52:39 +05:30
extable.c	riscv: extable: fix err reg writing in dedicated uaccess handler	2022-02-08 17:02:47 -08:00
fault.c	riscv: Make VM_WRITE imply VM_READ	2022-09-22 09:44:50 -07:00
hugetlbpage.c	hugetlbfs: remove hugetlb_add_hstate() warning for existing hstate	2020-06-03 20:09:46 -07:00
init.c	riscv: fix reserved memory setup	2022-11-10 14:46:33 -08:00
kasan_init.c	riscv: mm: add missing memcpy in kasan_init	2022-10-27 14:55:58 -07:00
Makefile	riscv: Add support for non-coherent devices using zicbom extension	2022-07-28 15:30:51 -07:00
pageattr.c	mm: pagewalk: Fix race between unmap and page walker	2022-09-03 10:13:13 -07:00
physaddr.c	riscv: Fix DEBUG_VIRTUAL false warnings	2022-03-03 15:32:04 -08:00
ptdump.c	riscv: Fix PTDUMP output now BPF region moved back to module region	2021-07-06 15:21:27 -07:00
tlbflush.c	RISC-V: Do not use cpumask data structure for hartid bitmap	2022-01-20 09:27:22 -08:00