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92a578b064
This time we have some more new material than we used to have during
the last couple of development cycles.
The most important part of it to me is the introduction of a unified
interface for accessing device properties provided by platform
firmware. It works with Device Trees and ACPI in a uniform way and
drivers using it need not worry about where the properties come
from as long as the platform firmware (either DT or ACPI) makes
them available. It covers both devices and "bare" device node
objects without struct device representation as that turns out to
be necessary in some cases. This has been in the works for quite
a few months (and development cycles) and has been approved by
all of the relevant maintainers.
On top of that, some drivers are switched over to the new interface
(at25, leds-gpio, gpio_keys_polled) and some additional changes are
made to the core GPIO subsystem to allow device drivers to manipulate
GPIOs in the "canonical" way on platforms that provide GPIO information
in their ACPI tables, but don't assign names to GPIO lines (in which
case the driver needs to do that on the basis of what it knows about
the device in question). That also has been approved by the GPIO
core maintainers and the rfkill driver is now going to use it.
Second is support for hardware P-states in the intel_pstate driver.
It uses CPUID to detect whether or not the feature is supported by
the processor in which case it will be enabled by default. However,
it can be disabled entirely from the kernel command line if necessary.
Next is support for a platform firmware interface based on ACPI
operation regions used by the PMIC (Power Management Integrated
Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
That interface is used for manipulating power resources and for
thermal management: sensor temperature reporting, trip point setting
and so on.
Also the ACPI core is now going to support the _DEP configuration
information in a limited way. Basically, _DEP it supposed to reflect
off-the-hierarchy dependencies between devices which may be very
indirect, like when AML for one device accesses locations in an
operation region handled by another device's driver (usually, the
device depended on this way is a serial bus or GPIO controller).
The support added this time is sufficient to make the ACPI battery
driver work on Asus T100A, but it is general enough to be able to
cover some other use cases in the future.
Finally, we have a new cpufreq driver for the Loongson1B processor.
In addition to the above, there are fixes and cleanups all over the
place as usual and a traditional ACPICA update to a recent upstream
release.
As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver
for Intel platforms should be able to handle power management of
the DMA engine correctly, the cpufreq-dt driver should interact
with the thermal subsystem in a better way and the ACPI backlight
driver should handle some more corner cases, among other things.
On top of the ACPICA update there are fixes for race conditions
in the ACPICA's interrupt handling code which might lead to some
random and strange looking failures on some systems.
In the cleanups department the most visible part is the series
of commits targeted at getting rid of the CONFIG_PM_RUNTIME
configuration option. That was triggered by a discussion
regarding the generic power domains code during which we realized
that trying to support certain combinations of PM config options
was painful and not really worth it, because nobody would use them
in production anyway. For this reason, we decided to make
CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and that lead to the
conclusion that the latter became redundant and CONFIG_PM could
be used instead of it. The material here makes that replacement
in a major part of the tree, but there will be at least one more
batch of that in the second part of the merge window.
Specifics:
- Support for retrieving device properties information from ACPI
_DSD device configuration objects and a unified device properties
interface for device drivers (and subsystems) on top of that.
As stated above, this works with Device Trees and ACPI and allows
device drivers to be written in a platform firmware (DT or ACPI)
agnostic way. The at25, leds-gpio and gpio_keys_polled drivers
are now going to use this new interface and the GPIO subsystem
is additionally modified to allow device drivers to assign names
to GPIO resources returned by ACPI _CRS objects (in case _DSD is
not present or does not provide the expected data). The changes
in this set are mostly from Mika Westerberg, Rafael J Wysocki,
Aaron Lu, and Darren Hart with some fixes from others (Fabio Estevam,
Geert Uytterhoeven).
- Support for Hardware Managed Performance States (HWP) as described
in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
driver. CPUID is used to detect whether or not the feature is
supported by the processor. If supported, it will be enabled
automatically unless the intel_pstate=no_hwp switch is present in
the kernel command line. From Dirk Brandewie.
- New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).
- Support for firmware interface based on ACPI operation regions
used by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
platforms for power resource control and thermal management
(Aaron Lu).
- Limited support for retrieving off-the-hierarchy dependencies
between devices from ACPI _DEP device configuration objects
and deferred probing support for the ACPI battery driver based
on the _DEP information to make that driver work on Asus T100A
(Lan Tianyu).
- New cpufreq driver for the Loongson1B processor (Kelvin Cheung).
- ACPICA update to upstream revision 20141107 which only affects
tools (Bob Moore).
- Fixes for race conditions in the ACPICA's interrupt handling
code and in the ACPI code related to system suspend and resume
(Lv Zheng and Rafael J Wysocki).
- ACPI core fix for an RCU-related issue in the ioremap() regions
management code that slowed down significantly after CPUs had
been allowed to enter idle states even if they'd had RCU callbakcs
queued and triggered some problems in certain proprietary graphics
driver (and elsewhere). The fix replaces synchronize_rcu() in
that code with synchronize_rcu_expedited() which makes the issue
go away. From Konstantin Khlebnikov.
- ACPI LPSS (Low-Power Subsystem) driver fix to handle power
management of the DMA engine included into the LPSS correctly.
The problem is that the DMA engine doesn't have ACPI PM support
of its own and it simply is turned off when the last LPSS device
having ACPI PM support goes into D3cold. To work around that,
the PM domain used by the ACPI LPSS driver is redesigned so at
least one device with ACPI PM support will be on as long as the
DMA engine is in use. From Andy Shevchenko.
- ACPI backlight driver fix to avoid using it on "Win8-compatible"
systems where it doesn't work and where it was used by default by
mistake (Aaron Lu).
- Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and
Ashwin Chaugule (mostly related to the upcoming ARM64 support).
- Intel RAPL (Running Average Power Limit) power capping driver
fixes and improvements including new processor IDs (Jacob Pan).
- Generic power domains modification to power up domains after
attaching devices to them to meet the expectations of device
drivers and bus types assuming devices to be accessible at
probe time (Ulf Hansson).
- Preliminary support for controlling device clocks from the
generic power domains core code and modifications of the
ARM/shmobile platform to use that feature (Ulf Hansson).
- Assorted minor fixes and cleanups of the generic power
domains core code (Ulf Hansson, Geert Uytterhoeven).
- Assorted minor fixes and cleanups of the device clocks control
code in the PM core (Geert Uytterhoeven, Grygorii Strashko).
- Consolidation of device power management Kconfig options by making
CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
which is now redundant (Rafael J Wysocki and Kevin Hilman). That
is the first batch of the changes needed for this purpose.
- Core device runtime power management support code cleanup related
to the execution of callbacks (Andrzej Hajda).
- cpuidle ARM support improvements (Lorenzo Pieralisi).
- cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and
a new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
Bartlomiej Zolnierkiewicz).
- New cpufreq driver callback (->ready) to be executed when the
cpufreq core is ready to use a given policy object and cpufreq-dt
driver modification to use that callback for cooling device
registration (Viresh Kumar).
- cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu,
James Geboski, Tomeu Vizoso).
- Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
Stefan Wahren, Petr Cvek).
- OPP (Operating Performance Points) framework modification to
allow OPPs to be removed too and update of a few cpufreq drivers
(cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
during initialization) on driver removal (Viresh Kumar).
- Hibernation core fixes and cleanups (Tina Ruchandani and
Markus Elfring).
- PM Kconfig fix related to CPU power management (Pankaj Dubey).
- cpupower tool fix (Prarit Bhargava).
/
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Merge tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull ACPI and power management updates from Rafael Wysocki:
"This time we have some more new material than we used to have during
the last couple of development cycles.
The most important part of it to me is the introduction of a unified
interface for accessing device properties provided by platform
firmware. It works with Device Trees and ACPI in a uniform way and
drivers using it need not worry about where the properties come from
as long as the platform firmware (either DT or ACPI) makes them
available. It covers both devices and "bare" device node objects
without struct device representation as that turns out to be necessary
in some cases. This has been in the works for quite a few months (and
development cycles) and has been approved by all of the relevant
maintainers.
On top of that, some drivers are switched over to the new interface
(at25, leds-gpio, gpio_keys_polled) and some additional changes are
made to the core GPIO subsystem to allow device drivers to manipulate
GPIOs in the "canonical" way on platforms that provide GPIO
information in their ACPI tables, but don't assign names to GPIO lines
(in which case the driver needs to do that on the basis of what it
knows about the device in question). That also has been approved by
the GPIO core maintainers and the rfkill driver is now going to use
it.
Second is support for hardware P-states in the intel_pstate driver.
It uses CPUID to detect whether or not the feature is supported by the
processor in which case it will be enabled by default. However, it
can be disabled entirely from the kernel command line if necessary.
Next is support for a platform firmware interface based on ACPI
operation regions used by the PMIC (Power Management Integrated
Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
That interface is used for manipulating power resources and for
thermal management: sensor temperature reporting, trip point setting
and so on.
Also the ACPI core is now going to support the _DEP configuration
information in a limited way. Basically, _DEP it supposed to reflect
off-the-hierarchy dependencies between devices which may be very
indirect, like when AML for one device accesses locations in an
operation region handled by another device's driver (usually, the
device depended on this way is a serial bus or GPIO controller). The
support added this time is sufficient to make the ACPI battery driver
work on Asus T100A, but it is general enough to be able to cover some
other use cases in the future.
Finally, we have a new cpufreq driver for the Loongson1B processor.
In addition to the above, there are fixes and cleanups all over the
place as usual and a traditional ACPICA update to a recent upstream
release.
As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver for
Intel platforms should be able to handle power management of the DMA
engine correctly, the cpufreq-dt driver should interact with the
thermal subsystem in a better way and the ACPI backlight driver should
handle some more corner cases, among other things.
On top of the ACPICA update there are fixes for race conditions in the
ACPICA's interrupt handling code which might lead to some random and
strange looking failures on some systems.
In the cleanups department the most visible part is the series of
commits targeted at getting rid of the CONFIG_PM_RUNTIME configuration
option. That was triggered by a discussion regarding the generic
power domains code during which we realized that trying to support
certain combinations of PM config options was painful and not really
worth it, because nobody would use them in production anyway. For
this reason, we decided to make CONFIG_PM_SLEEP select
CONFIG_PM_RUNTIME and that lead to the conclusion that the latter
became redundant and CONFIG_PM could be used instead of it. The
material here makes that replacement in a major part of the tree, but
there will be at least one more batch of that in the second part of
the merge window.
Specifics:
- Support for retrieving device properties information from ACPI _DSD
device configuration objects and a unified device properties
interface for device drivers (and subsystems) on top of that. As
stated above, this works with Device Trees and ACPI and allows
device drivers to be written in a platform firmware (DT or ACPI)
agnostic way. The at25, leds-gpio and gpio_keys_polled drivers are
now going to use this new interface and the GPIO subsystem is
additionally modified to allow device drivers to assign names to
GPIO resources returned by ACPI _CRS objects (in case _DSD is not
present or does not provide the expected data). The changes in
this set are mostly from Mika Westerberg, Rafael J Wysocki, Aaron
Lu, and Darren Hart with some fixes from others (Fabio Estevam,
Geert Uytterhoeven).
- Support for Hardware Managed Performance States (HWP) as described
in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
driver. CPUID is used to detect whether or not the feature is
supported by the processor. If supported, it will be enabled
automatically unless the intel_pstate=no_hwp switch is present in
the kernel command line. From Dirk Brandewie.
- New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).
- Support for firmware interface based on ACPI operation regions used
by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
platforms for power resource control and thermal management (Aaron
Lu).
- Limited support for retrieving off-the-hierarchy dependencies
between devices from ACPI _DEP device configuration objects and
deferred probing support for the ACPI battery driver based on the
_DEP information to make that driver work on Asus T100A (Lan
Tianyu).
- New cpufreq driver for the Loongson1B processor (Kelvin Cheung).
- ACPICA update to upstream revision 20141107 which only affects
tools (Bob Moore).
- Fixes for race conditions in the ACPICA's interrupt handling code
and in the ACPI code related to system suspend and resume (Lv Zheng
and Rafael J Wysocki).
- ACPI core fix for an RCU-related issue in the ioremap() regions
management code that slowed down significantly after CPUs had been
allowed to enter idle states even if they'd had RCU callbakcs
queued and triggered some problems in certain proprietary graphics
driver (and elsewhere). The fix replaces synchronize_rcu() in that
code with synchronize_rcu_expedited() which makes the issue go
away. From Konstantin Khlebnikov.
- ACPI LPSS (Low-Power Subsystem) driver fix to handle power
management of the DMA engine included into the LPSS correctly. The
problem is that the DMA engine doesn't have ACPI PM support of its
own and it simply is turned off when the last LPSS device having
ACPI PM support goes into D3cold. To work around that, the PM
domain used by the ACPI LPSS driver is redesigned so at least one
device with ACPI PM support will be on as long as the DMA engine is
in use. From Andy Shevchenko.
- ACPI backlight driver fix to avoid using it on "Win8-compatible"
systems where it doesn't work and where it was used by default by
mistake (Aaron Lu).
- Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and Ashwin
Chaugule (mostly related to the upcoming ARM64 support).
- Intel RAPL (Running Average Power Limit) power capping driver fixes
and improvements including new processor IDs (Jacob Pan).
- Generic power domains modification to power up domains after
attaching devices to them to meet the expectations of device
drivers and bus types assuming devices to be accessible at probe
time (Ulf Hansson).
- Preliminary support for controlling device clocks from the generic
power domains core code and modifications of the ARM/shmobile
platform to use that feature (Ulf Hansson).
- Assorted minor fixes and cleanups of the generic power domains core
code (Ulf Hansson, Geert Uytterhoeven).
- Assorted minor fixes and cleanups of the device clocks control code
in the PM core (Geert Uytterhoeven, Grygorii Strashko).
- Consolidation of device power management Kconfig options by making
CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
which is now redundant (Rafael J Wysocki and Kevin Hilman). That
is the first batch of the changes needed for this purpose.
- Core device runtime power management support code cleanup related
to the execution of callbacks (Andrzej Hajda).
- cpuidle ARM support improvements (Lorenzo Pieralisi).
- cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and a
new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
Bartlomiej Zolnierkiewicz).
- New cpufreq driver callback (->ready) to be executed when the
cpufreq core is ready to use a given policy object and cpufreq-dt
driver modification to use that callback for cooling device
registration (Viresh Kumar).
- cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu, James
Geboski, Tomeu Vizoso).
- Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
Stefan Wahren, Petr Cvek).
- OPP (Operating Performance Points) framework modification to allow
OPPs to be removed too and update of a few cpufreq drivers
(cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
during initialization) on driver removal (Viresh Kumar).
- Hibernation core fixes and cleanups (Tina Ruchandani and Markus
Elfring).
- PM Kconfig fix related to CPU power management (Pankaj Dubey).
- cpupower tool fix (Prarit Bhargava)"
* tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (120 commits)
i2c-omap / PM: Drop CONFIG_PM_RUNTIME from i2c-omap.c
dmaengine / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
tools: cpupower: fix return checks for sysfs_get_idlestate_count()
drivers: sh / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
e1000e / igb / PM: Eliminate CONFIG_PM_RUNTIME
MMC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
MFD / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
misc / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
media / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
input / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
leds: leds-gpio: Fix multiple instances registration without 'label' property
iio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
hsi / OMAP / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
i2c-hid / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
drm / exynos / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
gpio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
hwrandom / exynos / PM: Use CONFIG_PM in #ifdef
block / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
USB / PM: Drop CONFIG_PM_RUNTIME from the USB core
PM: Merge the SET*_RUNTIME_PM_OPS() macros
...
462 lines
14 KiB
C
462 lines
14 KiB
C
/*
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* linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
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*
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* Header file for Host Controller registers and I/O accessors.
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*
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* Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#ifndef __SDHCI_HW_H
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#define __SDHCI_HW_H
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#include <linux/scatterlist.h>
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <linux/mmc/sdhci.h>
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/*
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* Controller registers
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*/
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#define SDHCI_DMA_ADDRESS 0x00
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#define SDHCI_ARGUMENT2 SDHCI_DMA_ADDRESS
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#define SDHCI_BLOCK_SIZE 0x04
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#define SDHCI_MAKE_BLKSZ(dma, blksz) (((dma & 0x7) << 12) | (blksz & 0xFFF))
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#define SDHCI_BLOCK_COUNT 0x06
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#define SDHCI_ARGUMENT 0x08
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#define SDHCI_TRANSFER_MODE 0x0C
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#define SDHCI_TRNS_DMA 0x01
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#define SDHCI_TRNS_BLK_CNT_EN 0x02
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#define SDHCI_TRNS_AUTO_CMD12 0x04
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#define SDHCI_TRNS_AUTO_CMD23 0x08
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#define SDHCI_TRNS_READ 0x10
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#define SDHCI_TRNS_MULTI 0x20
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#define SDHCI_COMMAND 0x0E
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#define SDHCI_CMD_RESP_MASK 0x03
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#define SDHCI_CMD_CRC 0x08
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#define SDHCI_CMD_INDEX 0x10
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#define SDHCI_CMD_DATA 0x20
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#define SDHCI_CMD_ABORTCMD 0xC0
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#define SDHCI_CMD_RESP_NONE 0x00
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#define SDHCI_CMD_RESP_LONG 0x01
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#define SDHCI_CMD_RESP_SHORT 0x02
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#define SDHCI_CMD_RESP_SHORT_BUSY 0x03
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#define SDHCI_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff))
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#define SDHCI_GET_CMD(c) ((c>>8) & 0x3f)
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#define SDHCI_RESPONSE 0x10
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#define SDHCI_BUFFER 0x20
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#define SDHCI_PRESENT_STATE 0x24
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#define SDHCI_CMD_INHIBIT 0x00000001
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#define SDHCI_DATA_INHIBIT 0x00000002
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#define SDHCI_DOING_WRITE 0x00000100
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#define SDHCI_DOING_READ 0x00000200
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#define SDHCI_SPACE_AVAILABLE 0x00000400
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#define SDHCI_DATA_AVAILABLE 0x00000800
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#define SDHCI_CARD_PRESENT 0x00010000
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#define SDHCI_WRITE_PROTECT 0x00080000
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#define SDHCI_DATA_LVL_MASK 0x00F00000
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#define SDHCI_DATA_LVL_SHIFT 20
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#define SDHCI_DATA_0_LVL_MASK 0x00100000
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#define SDHCI_HOST_CONTROL 0x28
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#define SDHCI_CTRL_LED 0x01
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#define SDHCI_CTRL_4BITBUS 0x02
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#define SDHCI_CTRL_HISPD 0x04
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#define SDHCI_CTRL_DMA_MASK 0x18
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#define SDHCI_CTRL_SDMA 0x00
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#define SDHCI_CTRL_ADMA1 0x08
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#define SDHCI_CTRL_ADMA32 0x10
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#define SDHCI_CTRL_ADMA64 0x18
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#define SDHCI_CTRL_8BITBUS 0x20
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#define SDHCI_POWER_CONTROL 0x29
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#define SDHCI_POWER_ON 0x01
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#define SDHCI_POWER_180 0x0A
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#define SDHCI_POWER_300 0x0C
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#define SDHCI_POWER_330 0x0E
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#define SDHCI_BLOCK_GAP_CONTROL 0x2A
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#define SDHCI_WAKE_UP_CONTROL 0x2B
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#define SDHCI_WAKE_ON_INT 0x01
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#define SDHCI_WAKE_ON_INSERT 0x02
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#define SDHCI_WAKE_ON_REMOVE 0x04
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#define SDHCI_CLOCK_CONTROL 0x2C
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#define SDHCI_DIVIDER_SHIFT 8
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#define SDHCI_DIVIDER_HI_SHIFT 6
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#define SDHCI_DIV_MASK 0xFF
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#define SDHCI_DIV_MASK_LEN 8
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#define SDHCI_DIV_HI_MASK 0x300
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#define SDHCI_PROG_CLOCK_MODE 0x0020
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#define SDHCI_CLOCK_CARD_EN 0x0004
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#define SDHCI_CLOCK_INT_STABLE 0x0002
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#define SDHCI_CLOCK_INT_EN 0x0001
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#define SDHCI_TIMEOUT_CONTROL 0x2E
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#define SDHCI_SOFTWARE_RESET 0x2F
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#define SDHCI_RESET_ALL 0x01
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#define SDHCI_RESET_CMD 0x02
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#define SDHCI_RESET_DATA 0x04
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#define SDHCI_INT_STATUS 0x30
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#define SDHCI_INT_ENABLE 0x34
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#define SDHCI_SIGNAL_ENABLE 0x38
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#define SDHCI_INT_RESPONSE 0x00000001
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#define SDHCI_INT_DATA_END 0x00000002
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#define SDHCI_INT_BLK_GAP 0x00000004
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#define SDHCI_INT_DMA_END 0x00000008
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#define SDHCI_INT_SPACE_AVAIL 0x00000010
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#define SDHCI_INT_DATA_AVAIL 0x00000020
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#define SDHCI_INT_CARD_INSERT 0x00000040
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#define SDHCI_INT_CARD_REMOVE 0x00000080
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#define SDHCI_INT_CARD_INT 0x00000100
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#define SDHCI_INT_ERROR 0x00008000
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#define SDHCI_INT_TIMEOUT 0x00010000
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#define SDHCI_INT_CRC 0x00020000
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#define SDHCI_INT_END_BIT 0x00040000
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#define SDHCI_INT_INDEX 0x00080000
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#define SDHCI_INT_DATA_TIMEOUT 0x00100000
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#define SDHCI_INT_DATA_CRC 0x00200000
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#define SDHCI_INT_DATA_END_BIT 0x00400000
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#define SDHCI_INT_BUS_POWER 0x00800000
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#define SDHCI_INT_ACMD12ERR 0x01000000
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#define SDHCI_INT_ADMA_ERROR 0x02000000
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|
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#define SDHCI_INT_NORMAL_MASK 0x00007FFF
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#define SDHCI_INT_ERROR_MASK 0xFFFF8000
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#define SDHCI_INT_CMD_MASK (SDHCI_INT_RESPONSE | SDHCI_INT_TIMEOUT | \
|
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SDHCI_INT_CRC | SDHCI_INT_END_BIT | SDHCI_INT_INDEX)
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#define SDHCI_INT_DATA_MASK (SDHCI_INT_DATA_END | SDHCI_INT_DMA_END | \
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SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL | \
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SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_DATA_CRC | \
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SDHCI_INT_DATA_END_BIT | SDHCI_INT_ADMA_ERROR | \
|
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SDHCI_INT_BLK_GAP)
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#define SDHCI_INT_ALL_MASK ((unsigned int)-1)
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#define SDHCI_ACMD12_ERR 0x3C
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|
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#define SDHCI_HOST_CONTROL2 0x3E
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#define SDHCI_CTRL_UHS_MASK 0x0007
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#define SDHCI_CTRL_UHS_SDR12 0x0000
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#define SDHCI_CTRL_UHS_SDR25 0x0001
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#define SDHCI_CTRL_UHS_SDR50 0x0002
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#define SDHCI_CTRL_UHS_SDR104 0x0003
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#define SDHCI_CTRL_UHS_DDR50 0x0004
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#define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
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#define SDHCI_CTRL_VDD_180 0x0008
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#define SDHCI_CTRL_DRV_TYPE_MASK 0x0030
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#define SDHCI_CTRL_DRV_TYPE_B 0x0000
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#define SDHCI_CTRL_DRV_TYPE_A 0x0010
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#define SDHCI_CTRL_DRV_TYPE_C 0x0020
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#define SDHCI_CTRL_DRV_TYPE_D 0x0030
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#define SDHCI_CTRL_EXEC_TUNING 0x0040
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#define SDHCI_CTRL_TUNED_CLK 0x0080
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#define SDHCI_CTRL_PRESET_VAL_ENABLE 0x8000
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|
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#define SDHCI_CAPABILITIES 0x40
|
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#define SDHCI_TIMEOUT_CLK_MASK 0x0000003F
|
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#define SDHCI_TIMEOUT_CLK_SHIFT 0
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#define SDHCI_TIMEOUT_CLK_UNIT 0x00000080
|
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#define SDHCI_CLOCK_BASE_MASK 0x00003F00
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#define SDHCI_CLOCK_V3_BASE_MASK 0x0000FF00
|
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#define SDHCI_CLOCK_BASE_SHIFT 8
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#define SDHCI_MAX_BLOCK_MASK 0x00030000
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#define SDHCI_MAX_BLOCK_SHIFT 16
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#define SDHCI_CAN_DO_8BIT 0x00040000
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#define SDHCI_CAN_DO_ADMA2 0x00080000
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#define SDHCI_CAN_DO_ADMA1 0x00100000
|
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#define SDHCI_CAN_DO_HISPD 0x00200000
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#define SDHCI_CAN_DO_SDMA 0x00400000
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#define SDHCI_CAN_VDD_330 0x01000000
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#define SDHCI_CAN_VDD_300 0x02000000
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|
#define SDHCI_CAN_VDD_180 0x04000000
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#define SDHCI_CAN_64BIT 0x10000000
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|
|
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#define SDHCI_SUPPORT_SDR50 0x00000001
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#define SDHCI_SUPPORT_SDR104 0x00000002
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#define SDHCI_SUPPORT_DDR50 0x00000004
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#define SDHCI_DRIVER_TYPE_A 0x00000010
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#define SDHCI_DRIVER_TYPE_C 0x00000020
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#define SDHCI_DRIVER_TYPE_D 0x00000040
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#define SDHCI_RETUNING_TIMER_COUNT_MASK 0x00000F00
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#define SDHCI_RETUNING_TIMER_COUNT_SHIFT 8
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#define SDHCI_USE_SDR50_TUNING 0x00002000
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#define SDHCI_RETUNING_MODE_MASK 0x0000C000
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#define SDHCI_RETUNING_MODE_SHIFT 14
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#define SDHCI_CLOCK_MUL_MASK 0x00FF0000
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#define SDHCI_CLOCK_MUL_SHIFT 16
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#define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
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|
|
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#define SDHCI_CAPABILITIES_1 0x44
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|
|
|
#define SDHCI_MAX_CURRENT 0x48
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|
#define SDHCI_MAX_CURRENT_LIMIT 0xFF
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#define SDHCI_MAX_CURRENT_330_MASK 0x0000FF
|
|
#define SDHCI_MAX_CURRENT_330_SHIFT 0
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|
#define SDHCI_MAX_CURRENT_300_MASK 0x00FF00
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|
#define SDHCI_MAX_CURRENT_300_SHIFT 8
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|
#define SDHCI_MAX_CURRENT_180_MASK 0xFF0000
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|
#define SDHCI_MAX_CURRENT_180_SHIFT 16
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|
#define SDHCI_MAX_CURRENT_MULTIPLIER 4
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|
|
|
/* 4C-4F reserved for more max current */
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|
|
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#define SDHCI_SET_ACMD12_ERROR 0x50
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|
#define SDHCI_SET_INT_ERROR 0x52
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|
|
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#define SDHCI_ADMA_ERROR 0x54
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|
|
|
/* 55-57 reserved */
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|
|
|
#define SDHCI_ADMA_ADDRESS 0x58
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|
#define SDHCI_ADMA_ADDRESS_HI 0x5C
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|
|
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/* 60-FB reserved */
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|
|
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#define SDHCI_PRESET_FOR_SDR12 0x66
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#define SDHCI_PRESET_FOR_SDR25 0x68
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#define SDHCI_PRESET_FOR_SDR50 0x6A
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#define SDHCI_PRESET_FOR_SDR104 0x6C
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|
#define SDHCI_PRESET_FOR_DDR50 0x6E
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|
#define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
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|
#define SDHCI_PRESET_DRV_MASK 0xC000
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|
#define SDHCI_PRESET_DRV_SHIFT 14
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|
#define SDHCI_PRESET_CLKGEN_SEL_MASK 0x400
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|
#define SDHCI_PRESET_CLKGEN_SEL_SHIFT 10
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|
#define SDHCI_PRESET_SDCLK_FREQ_MASK 0x3FF
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|
#define SDHCI_PRESET_SDCLK_FREQ_SHIFT 0
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|
|
|
#define SDHCI_SLOT_INT_STATUS 0xFC
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|
|
|
#define SDHCI_HOST_VERSION 0xFE
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|
#define SDHCI_VENDOR_VER_MASK 0xFF00
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|
#define SDHCI_VENDOR_VER_SHIFT 8
|
|
#define SDHCI_SPEC_VER_MASK 0x00FF
|
|
#define SDHCI_SPEC_VER_SHIFT 0
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|
#define SDHCI_SPEC_100 0
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|
#define SDHCI_SPEC_200 1
|
|
#define SDHCI_SPEC_300 2
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|
|
|
/*
|
|
* End of controller registers.
|
|
*/
|
|
|
|
#define SDHCI_MAX_DIV_SPEC_200 256
|
|
#define SDHCI_MAX_DIV_SPEC_300 2046
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|
|
|
/*
|
|
* Host SDMA buffer boundary. Valid values from 4K to 512K in powers of 2.
|
|
*/
|
|
#define SDHCI_DEFAULT_BOUNDARY_SIZE (512 * 1024)
|
|
#define SDHCI_DEFAULT_BOUNDARY_ARG (ilog2(SDHCI_DEFAULT_BOUNDARY_SIZE) - 12)
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|
|
|
/* ADMA2 32-bit DMA descriptor size */
|
|
#define SDHCI_ADMA2_32_DESC_SZ 8
|
|
|
|
/* ADMA2 32-bit DMA alignment */
|
|
#define SDHCI_ADMA2_32_ALIGN 4
|
|
|
|
/* ADMA2 32-bit descriptor */
|
|
struct sdhci_adma2_32_desc {
|
|
__le16 cmd;
|
|
__le16 len;
|
|
__le32 addr;
|
|
} __packed __aligned(SDHCI_ADMA2_32_ALIGN);
|
|
|
|
/* ADMA2 64-bit DMA descriptor size */
|
|
#define SDHCI_ADMA2_64_DESC_SZ 12
|
|
|
|
/* ADMA2 64-bit DMA alignment */
|
|
#define SDHCI_ADMA2_64_ALIGN 8
|
|
|
|
/*
|
|
* ADMA2 64-bit descriptor. Note 12-byte descriptor can't always be 8-byte
|
|
* aligned.
|
|
*/
|
|
struct sdhci_adma2_64_desc {
|
|
__le16 cmd;
|
|
__le16 len;
|
|
__le32 addr_lo;
|
|
__le32 addr_hi;
|
|
} __packed __aligned(4);
|
|
|
|
#define ADMA2_TRAN_VALID 0x21
|
|
#define ADMA2_NOP_END_VALID 0x3
|
|
#define ADMA2_END 0x2
|
|
|
|
/*
|
|
* Maximum segments assuming a 512KiB maximum requisition size and a minimum
|
|
* 4KiB page size.
|
|
*/
|
|
#define SDHCI_MAX_SEGS 128
|
|
|
|
struct sdhci_ops {
|
|
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
|
|
u32 (*read_l)(struct sdhci_host *host, int reg);
|
|
u16 (*read_w)(struct sdhci_host *host, int reg);
|
|
u8 (*read_b)(struct sdhci_host *host, int reg);
|
|
void (*write_l)(struct sdhci_host *host, u32 val, int reg);
|
|
void (*write_w)(struct sdhci_host *host, u16 val, int reg);
|
|
void (*write_b)(struct sdhci_host *host, u8 val, int reg);
|
|
#endif
|
|
|
|
void (*set_clock)(struct sdhci_host *host, unsigned int clock);
|
|
|
|
int (*enable_dma)(struct sdhci_host *host);
|
|
unsigned int (*get_max_clock)(struct sdhci_host *host);
|
|
unsigned int (*get_min_clock)(struct sdhci_host *host);
|
|
unsigned int (*get_timeout_clock)(struct sdhci_host *host);
|
|
unsigned int (*get_max_timeout_count)(struct sdhci_host *host);
|
|
void (*set_timeout)(struct sdhci_host *host,
|
|
struct mmc_command *cmd);
|
|
void (*set_bus_width)(struct sdhci_host *host, int width);
|
|
void (*platform_send_init_74_clocks)(struct sdhci_host *host,
|
|
u8 power_mode);
|
|
unsigned int (*get_ro)(struct sdhci_host *host);
|
|
void (*reset)(struct sdhci_host *host, u8 mask);
|
|
int (*platform_execute_tuning)(struct sdhci_host *host, u32 opcode);
|
|
void (*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs);
|
|
void (*hw_reset)(struct sdhci_host *host);
|
|
void (*adma_workaround)(struct sdhci_host *host, u32 intmask);
|
|
void (*platform_init)(struct sdhci_host *host);
|
|
void (*card_event)(struct sdhci_host *host);
|
|
};
|
|
|
|
#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
|
|
|
|
static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)
|
|
{
|
|
if (unlikely(host->ops->write_l))
|
|
host->ops->write_l(host, val, reg);
|
|
else
|
|
writel(val, host->ioaddr + reg);
|
|
}
|
|
|
|
static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg)
|
|
{
|
|
if (unlikely(host->ops->write_w))
|
|
host->ops->write_w(host, val, reg);
|
|
else
|
|
writew(val, host->ioaddr + reg);
|
|
}
|
|
|
|
static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
|
|
{
|
|
if (unlikely(host->ops->write_b))
|
|
host->ops->write_b(host, val, reg);
|
|
else
|
|
writeb(val, host->ioaddr + reg);
|
|
}
|
|
|
|
static inline u32 sdhci_readl(struct sdhci_host *host, int reg)
|
|
{
|
|
if (unlikely(host->ops->read_l))
|
|
return host->ops->read_l(host, reg);
|
|
else
|
|
return readl(host->ioaddr + reg);
|
|
}
|
|
|
|
static inline u16 sdhci_readw(struct sdhci_host *host, int reg)
|
|
{
|
|
if (unlikely(host->ops->read_w))
|
|
return host->ops->read_w(host, reg);
|
|
else
|
|
return readw(host->ioaddr + reg);
|
|
}
|
|
|
|
static inline u8 sdhci_readb(struct sdhci_host *host, int reg)
|
|
{
|
|
if (unlikely(host->ops->read_b))
|
|
return host->ops->read_b(host, reg);
|
|
else
|
|
return readb(host->ioaddr + reg);
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void sdhci_writel(struct sdhci_host *host, u32 val, int reg)
|
|
{
|
|
writel(val, host->ioaddr + reg);
|
|
}
|
|
|
|
static inline void sdhci_writew(struct sdhci_host *host, u16 val, int reg)
|
|
{
|
|
writew(val, host->ioaddr + reg);
|
|
}
|
|
|
|
static inline void sdhci_writeb(struct sdhci_host *host, u8 val, int reg)
|
|
{
|
|
writeb(val, host->ioaddr + reg);
|
|
}
|
|
|
|
static inline u32 sdhci_readl(struct sdhci_host *host, int reg)
|
|
{
|
|
return readl(host->ioaddr + reg);
|
|
}
|
|
|
|
static inline u16 sdhci_readw(struct sdhci_host *host, int reg)
|
|
{
|
|
return readw(host->ioaddr + reg);
|
|
}
|
|
|
|
static inline u8 sdhci_readb(struct sdhci_host *host, int reg)
|
|
{
|
|
return readb(host->ioaddr + reg);
|
|
}
|
|
|
|
#endif /* CONFIG_MMC_SDHCI_IO_ACCESSORS */
|
|
|
|
extern struct sdhci_host *sdhci_alloc_host(struct device *dev,
|
|
size_t priv_size);
|
|
extern void sdhci_free_host(struct sdhci_host *host);
|
|
|
|
static inline void *sdhci_priv(struct sdhci_host *host)
|
|
{
|
|
return (void *)host->private;
|
|
}
|
|
|
|
extern void sdhci_card_detect(struct sdhci_host *host);
|
|
extern int sdhci_add_host(struct sdhci_host *host);
|
|
extern void sdhci_remove_host(struct sdhci_host *host, int dead);
|
|
extern void sdhci_send_command(struct sdhci_host *host,
|
|
struct mmc_command *cmd);
|
|
|
|
static inline bool sdhci_sdio_irq_enabled(struct sdhci_host *host)
|
|
{
|
|
return !!(host->flags & SDHCI_SDIO_IRQ_ENABLED);
|
|
}
|
|
|
|
void sdhci_set_clock(struct sdhci_host *host, unsigned int clock);
|
|
void sdhci_set_bus_width(struct sdhci_host *host, int width);
|
|
void sdhci_reset(struct sdhci_host *host, u8 mask);
|
|
void sdhci_set_uhs_signaling(struct sdhci_host *host, unsigned timing);
|
|
|
|
#ifdef CONFIG_PM
|
|
extern int sdhci_suspend_host(struct sdhci_host *host);
|
|
extern int sdhci_resume_host(struct sdhci_host *host);
|
|
extern void sdhci_enable_irq_wakeups(struct sdhci_host *host);
|
|
extern int sdhci_runtime_suspend_host(struct sdhci_host *host);
|
|
extern int sdhci_runtime_resume_host(struct sdhci_host *host);
|
|
#endif
|
|
|
|
#endif /* __SDHCI_HW_H */
|