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222cb1bf18
The IM-PD1 PrimeCells all have pclk assignments though this clock cannot be controlled, and we need to provide this as a dummy clock for the PL061 GPIO driver to probe, so let's assign it to all the cells on the board. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
182 lines
5.0 KiB
C
182 lines
5.0 KiB
C
/*
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* Clock driver for the ARM Integrator/IM-PD1 board
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* Copyright (C) 2012-2013 Linus Walleij
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk-provider.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/platform_data/clk-integrator.h>
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#include "clk-icst.h"
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#define IMPD1_OSC1 0x00
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#define IMPD1_OSC2 0x04
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#define IMPD1_LOCK 0x08
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struct impd1_clk {
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char *pclkname;
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struct clk *pclk;
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char *vco1name;
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struct clk *vco1clk;
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char *vco2name;
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struct clk *vco2clk;
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struct clk *mmciclk;
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char *uartname;
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struct clk *uartclk;
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char *spiname;
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struct clk *spiclk;
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char *scname;
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struct clk *scclk;
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struct clk_lookup *clks[15];
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};
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/* One entry for each connected IM-PD1 LM */
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static struct impd1_clk impd1_clks[4];
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/*
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* There are two VCO's on the IM-PD1
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*/
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static const struct icst_params impd1_vco1_params = {
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.ref = 24000000, /* 24 MHz */
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.vco_max = ICST525_VCO_MAX_3V,
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.vco_min = ICST525_VCO_MIN,
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.vd_min = 12,
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.vd_max = 519,
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.rd_min = 3,
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.rd_max = 120,
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.s2div = icst525_s2div,
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.idx2s = icst525_idx2s,
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};
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static const struct clk_icst_desc impd1_icst1_desc = {
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.params = &impd1_vco1_params,
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.vco_offset = IMPD1_OSC1,
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.lock_offset = IMPD1_LOCK,
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};
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static const struct icst_params impd1_vco2_params = {
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.ref = 24000000, /* 24 MHz */
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.vco_max = ICST525_VCO_MAX_3V,
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.vco_min = ICST525_VCO_MIN,
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.vd_min = 12,
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.vd_max = 519,
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.rd_min = 3,
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.rd_max = 120,
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.s2div = icst525_s2div,
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.idx2s = icst525_idx2s,
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};
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static const struct clk_icst_desc impd1_icst2_desc = {
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.params = &impd1_vco2_params,
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.vco_offset = IMPD1_OSC2,
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.lock_offset = IMPD1_LOCK,
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};
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/**
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* integrator_impd1_clk_init() - set up the integrator clock tree
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* @base: base address of the logic module (LM)
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* @id: the ID of this LM
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*/
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void integrator_impd1_clk_init(void __iomem *base, unsigned int id)
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{
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struct impd1_clk *imc;
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struct clk *clk;
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struct clk *pclk;
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int i;
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if (id > 3) {
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pr_crit("no more than 4 LMs can be attached\n");
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return;
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}
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imc = &impd1_clks[id];
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/* Register the fixed rate PCLK */
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imc->pclkname = kasprintf(GFP_KERNEL, "lm%x-pclk", id);
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pclk = clk_register_fixed_rate(NULL, imc->pclkname, NULL,
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CLK_IS_ROOT, 0);
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imc->pclk = pclk;
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imc->vco1name = kasprintf(GFP_KERNEL, "lm%x-vco1", id);
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clk = icst_clk_register(NULL, &impd1_icst1_desc, imc->vco1name, NULL,
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base);
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imc->vco1clk = clk;
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imc->clks[0] = clkdev_alloc(pclk, "apb_pclk", "lm%x:01000", id);
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imc->clks[1] = clkdev_alloc(clk, NULL, "lm%x:01000", id);
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/* VCO2 is also called "CLK2" */
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imc->vco2name = kasprintf(GFP_KERNEL, "lm%x-vco2", id);
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clk = icst_clk_register(NULL, &impd1_icst2_desc, imc->vco2name, NULL,
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base);
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imc->vco2clk = clk;
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/* MMCI uses CLK2 right off */
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imc->clks[2] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00700", id);
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imc->clks[3] = clkdev_alloc(clk, NULL, "lm%x:00700", id);
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/* UART reference clock divides CLK2 by a fixed factor 4 */
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imc->uartname = kasprintf(GFP_KERNEL, "lm%x-uartclk", id);
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clk = clk_register_fixed_factor(NULL, imc->uartname, imc->vco2name,
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CLK_IGNORE_UNUSED, 1, 4);
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imc->uartclk = clk;
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imc->clks[4] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00100", id);
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imc->clks[5] = clkdev_alloc(clk, NULL, "lm%x:00100", id);
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imc->clks[6] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00200", id);
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imc->clks[7] = clkdev_alloc(clk, NULL, "lm%x:00200", id);
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/* SPI PL022 clock divides CLK2 by a fixed factor 64 */
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imc->spiname = kasprintf(GFP_KERNEL, "lm%x-spiclk", id);
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clk = clk_register_fixed_factor(NULL, imc->spiname, imc->vco2name,
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CLK_IGNORE_UNUSED, 1, 64);
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imc->clks[8] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00300", id);
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imc->clks[9] = clkdev_alloc(clk, NULL, "lm%x:00300", id);
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/* The GPIO blocks and AACI have only PCLK */
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imc->clks[10] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00400", id);
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imc->clks[11] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00500", id);
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imc->clks[12] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00800", id);
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/* Smart Card clock divides CLK2 by a fixed factor 4 */
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imc->scname = kasprintf(GFP_KERNEL, "lm%x-scclk", id);
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clk = clk_register_fixed_factor(NULL, imc->scname, imc->vco2name,
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CLK_IGNORE_UNUSED, 1, 4);
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imc->scclk = clk;
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imc->clks[13] = clkdev_alloc(pclk, "apb_pclk", "lm%x:00600", id);
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imc->clks[14] = clkdev_alloc(clk, NULL, "lm%x:00600", id);
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for (i = 0; i < ARRAY_SIZE(imc->clks); i++)
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clkdev_add(imc->clks[i]);
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}
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EXPORT_SYMBOL_GPL(integrator_impd1_clk_init);
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void integrator_impd1_clk_exit(unsigned int id)
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{
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int i;
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struct impd1_clk *imc;
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if (id > 3)
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return;
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imc = &impd1_clks[id];
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for (i = 0; i < ARRAY_SIZE(imc->clks); i++)
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clkdev_drop(imc->clks[i]);
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clk_unregister(imc->spiclk);
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clk_unregister(imc->uartclk);
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clk_unregister(imc->vco2clk);
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clk_unregister(imc->vco1clk);
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clk_unregister(imc->pclk);
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kfree(imc->scname);
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kfree(imc->spiname);
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kfree(imc->uartname);
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kfree(imc->vco2name);
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kfree(imc->vco1name);
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kfree(imc->pclkname);
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}
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EXPORT_SYMBOL_GPL(integrator_impd1_clk_exit);
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