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As the user manual and code comment said, Loongson-3 has 4-scache banks, while Loongson-2K has only 2 banks, so we should multiply the number of scache banks, this multiply operation should be done by c->scache.sets instead of scache_size, otherwise we will get the wrong scache size when execute lscpu. For example, the scache size should be 8192K instead of 2048K on the Loongson 3A3000 and 3A4000 platform, we can see the related info in the following boot message: [loongson@linux ~]$ dmesg | grep "Unified secondary cache" [ 0.000000] Unified secondary cache 8192kB 16-way, linesize 64 bytes. [ 4.061909] Unified secondary cache 8192kB 16-way, linesize 64 bytes. [ 4.125629] Unified secondary cache 8192kB 16-way, linesize 64 bytes. [ 4.188379] Unified secondary cache 8192kB 16-way, linesize 64 bytes. E.g. without this patch: [loongson@linux ~]$ cat /sys/devices/system/cpu/cpu*/cache/index2/size 2048K 2048K 2048K 2048K [loongson@linux ~]$ lscpu | grep "L2 cache" L2 cache: 2048K With this patch: [loongson@linux ~]$ cat /sys/devices/system/cpu/cpu*/cache/index2/size 8192K 8192K 8192K 8192K [loongson@linux ~]$ lscpu | grep "L2 cache" L2 cache: 8192K Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> |
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.. | ||
c-octeon.c | ||
c-r3k.c | ||
c-r4k.c | ||
c-tx39.c | ||
cache.c | ||
cerr-sb1.c | ||
cex-gen.S | ||
cex-oct.S | ||
cex-sb1.S | ||
context.c | ||
dma-noncoherent.c | ||
extable.c | ||
fault.c | ||
highmem.c | ||
hugetlbpage.c | ||
init.c | ||
ioremap64.c | ||
ioremap.c | ||
Makefile | ||
mmap.c | ||
page-funcs.S | ||
page.c | ||
pgtable-32.c | ||
pgtable-64.c | ||
pgtable.c | ||
sc-debugfs.c | ||
sc-ip22.c | ||
sc-mips.c | ||
sc-r5k.c | ||
sc-rm7k.c | ||
tlb-funcs.S | ||
tlb-r3k.c | ||
tlb-r4k.c | ||
tlbex-fault.S | ||
tlbex.c | ||
uasm-micromips.c | ||
uasm-mips.c | ||
uasm.c |