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The Tegra HSP block supports 'shared mailboxes' that are simple 32-bit registers consisting of a FULL bit in MSB position and 31 bits of data. The hardware can be configured to trigger interrupts when a mailbox is empty or full. Add support for these shared mailboxes to the HSP driver. The initial use for the mailboxes is the Tegra Combined UART. For this purpose, we use interrupts to receive data, and spinning to wait for the transmit mailbox to be emptied to minimize unnecessary overhead. Based on work by Mikko Perttunen <mperttunen@nvidia.com>. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> |
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| .. | ||
| arm_mhu.c | ||
| bcm2835-mailbox.c | ||
| bcm-flexrm-mailbox.c | ||
| bcm-pdc-mailbox.c | ||
| hi3660-mailbox.c | ||
| hi6220-mailbox.c | ||
| imx-mailbox.c | ||
| Kconfig | ||
| mailbox-altera.c | ||
| mailbox-sti.c | ||
| mailbox-test.c | ||
| mailbox-xgene-slimpro.c | ||
| mailbox.c | ||
| mailbox.h | ||
| Makefile | ||
| mtk-cmdq-mailbox.c | ||
| omap-mailbox.c | ||
| pcc.c | ||
| pl320-ipc.c | ||
| platform_mhu.c | ||
| qcom-apcs-ipc-mailbox.c | ||
| rockchip-mailbox.c | ||
| stm32-ipcc.c | ||
| tegra-hsp.c | ||
| ti-msgmgr.c | ||