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b5affb0147
This patch added bf60x to current blackfin kernel framework. Signed-off-by: Bob Liu <lliubbo@gmail.com>
57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/*
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* This file defines the fixed addresses where userspace programs
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* can find atomic code sequences.
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*
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* Copyright 2007-2008 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __BFIN_ASM_FIXED_CODE_H__
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#define __BFIN_ASM_FIXED_CODE_H__
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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#include <linux/linkage.h>
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#include <linux/ptrace.h>
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extern asmlinkage void finish_atomic_sections(struct pt_regs *regs);
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extern char fixed_code_start;
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extern char fixed_code_end;
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extern int atomic_xchg32(void);
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extern int atomic_cas32(void);
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extern int atomic_add32(void);
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extern int atomic_sub32(void);
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extern int atomic_ior32(void);
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extern int atomic_and32(void);
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extern int atomic_xor32(void);
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extern void safe_user_instruction(void);
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extern void sigreturn_stub(void);
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#endif
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#endif
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#ifndef CONFIG_PHY_RAM_BASE_ADDRESS
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#define CONFIG_PHY_RAM_BASE_ADDRESS 0x0
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#endif
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#define FIXED_CODE_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
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#define SIGRETURN_STUB (CONFIG_PHY_RAM_BASE_ADDRESS + 0x400)
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#define ATOMIC_SEQS_START (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
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#define ATOMIC_XCHG32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x410)
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#define ATOMIC_CAS32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x420)
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#define ATOMIC_ADD32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x430)
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#define ATOMIC_SUB32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x440)
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#define ATOMIC_IOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x450)
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#define ATOMIC_AND32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x460)
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#define ATOMIC_XOR32 (CONFIG_PHY_RAM_BASE_ADDRESS + 0x470)
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#define ATOMIC_SEQS_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
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#define SAFE_USER_INSTRUCTION (CONFIG_PHY_RAM_BASE_ADDRESS + 0x480)
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#define FIXED_CODE_END (CONFIG_PHY_RAM_BASE_ADDRESS + 0x490)
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#endif
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