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d38ceaf99e
This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by: Christian König <christian.koenig@amd.com> Acked-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
106 lines
3.8 KiB
C
106 lines
3.8 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Christian König.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Christian König
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*/
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#include <linux/hdmi.h>
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#include <linux/gcd.h>
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#include <drm/drmP.h>
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#include <drm/amdgpu_drm.h>
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#include "amdgpu.h"
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static const struct amdgpu_afmt_acr amdgpu_afmt_predefined_acr[] = {
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/* 32kHz 44.1kHz 48kHz */
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/* Clock N CTS N CTS N CTS */
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{ 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
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{ 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
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{ 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
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{ 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
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{ 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
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{ 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
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{ 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
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{ 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
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{ 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
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{ 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
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};
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/*
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* calculate CTS and N values if they are not found in the table
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*/
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static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq)
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{
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int n, cts;
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unsigned long div, mul;
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/* Safe, but overly large values */
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n = 128 * freq;
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cts = clock * 1000;
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/* Smallest valid fraction */
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div = gcd(n, cts);
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n /= div;
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cts /= div;
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/*
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* The optimal N is 128*freq/1000. Calculate the closest larger
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* value that doesn't truncate any bits.
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*/
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mul = ((128*freq/1000) + (n-1))/n;
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n *= mul;
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cts *= mul;
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/* Check that we are in spec (not always possible) */
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if (n < (128*freq/1500))
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printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
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if (n > (128*freq/300))
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printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
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*N = n;
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*CTS = cts;
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DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
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*N, *CTS, freq);
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}
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struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock)
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{
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struct amdgpu_afmt_acr res;
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u8 i;
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/* Precalculated values for common clocks */
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for (i = 0; i < ARRAY_SIZE(amdgpu_afmt_predefined_acr); i++) {
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if (amdgpu_afmt_predefined_acr[i].clock == clock)
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return amdgpu_afmt_predefined_acr[i];
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}
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/* And odd clocks get manually calculated */
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amdgpu_afmt_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
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amdgpu_afmt_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
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amdgpu_afmt_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
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return res;
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}
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