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947bf103fc
This helps remove asid-to-mm reverse map While mm->context.id contains the ASID assigned to a process, our ASID allocator also used asid_mm_map[] reverse map. In a new allocation cycle (mm->ASID >= @asid_cache), the Round Robin ASID allocator used this to check if new @asid_cache belonged to some mm2 (from prev cycle). If so, it could locate that mm using the ASID reverse map, and mark that mm as unallocated ASID, to force it to refresh at the time of switch_mm() However, for SMP, the reverse map has to be maintained per CPU, so becomes 2 dimensional, hence got rid of it. With reverse map gone, it is NOT possible to reach out to current assignee. So we track the ASID allocation generation/cycle and on every switch_mm(), check if the current generation of CPU ASID is same as mm's ASID; If not it is refreshed. (Based loosely on arch/sh implementation) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
151 lines
4.7 KiB
C
151 lines
4.7 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* vineetg: May 2011
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* -Refactored get_new_mmu_context( ) to only handle live-mm.
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* retiring-mm handled in other hooks
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*
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* Vineetg: March 25th, 2008: Bug #92690
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* -Major rewrite of Core ASID allocation routine get_new_mmu_context
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*
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* Amit Bhor, Sameer Dhavale: Codito Technologies 2004
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*/
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#ifndef _ASM_ARC_MMU_CONTEXT_H
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#define _ASM_ARC_MMU_CONTEXT_H
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#include <asm/arcregs.h>
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#include <asm/tlb.h>
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#include <asm-generic/mm_hooks.h>
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/* ARC700 ASID Management
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*
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* ARC MMU provides 8-bit ASID (0..255) to TAG TLB entries, allowing entries
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* with same vaddr (different tasks) to co-exit. This provides for
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* "Fast Context Switch" i.e. no TLB flush on ctxt-switch
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*
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* Linux assigns each task a unique ASID. A simple round-robin allocation
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* of H/w ASID is done using software tracker @asid_cache.
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* When it reaches max 255, the allocation cycle starts afresh by flushing
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* the entire TLB and wrapping ASID back to zero.
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*
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* A new allocation cycle, post rollover, could potentially reassign an ASID
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* to a different task. Thus the rule is to refresh the ASID in a new cycle.
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* The 32 bit @asid_cache (and mm->asid) have 8 bits MMU PID and rest 24 bits
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* serve as cycle/generation indicator and natural 32 bit unsigned math
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* automagically increments the generation when lower 8 bits rollover.
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*/
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#define MM_CTXT_ASID_MASK 0x000000ff /* MMU PID reg :8 bit PID */
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#define MM_CTXT_CYCLE_MASK (~MM_CTXT_ASID_MASK)
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#define MM_CTXT_FIRST_CYCLE (MM_CTXT_ASID_MASK + 1)
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#define MM_CTXT_NO_ASID 0UL
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#define hw_pid(mm) (mm->context.asid & MM_CTXT_ASID_MASK)
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extern unsigned int asid_cache;
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/*
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* Get a new ASID if task doesn't have a valid one (unalloc or from prev cycle)
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* Also set the MMU PID register to existing/updated ASID
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*/
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static inline void get_new_mmu_context(struct mm_struct *mm)
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{
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unsigned long flags;
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local_irq_save(flags);
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/*
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* Move to new ASID if it was not from current alloc-cycle/generation.
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* This is done by ensuring that the generation bits in both mm->ASID
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* and cpu's ASID counter are exactly same.
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*
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* Note: Callers needing new ASID unconditionally, independent of
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* generation, e.g. local_flush_tlb_mm() for forking parent,
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* first need to destroy the context, setting it to invalid
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* value.
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*/
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if (!((mm->context.asid ^ asid_cache) & MM_CTXT_CYCLE_MASK))
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goto set_hw;
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/* move to new ASID and handle rollover */
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if (unlikely(!(++asid_cache & MM_CTXT_ASID_MASK))) {
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flush_tlb_all();
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/*
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* Above checke for rollover of 8 bit ASID in 32 bit container.
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* If the container itself wrapped around, set it to a non zero
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* "generation" to distinguish from no context
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*/
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if (!asid_cache)
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asid_cache = MM_CTXT_FIRST_CYCLE;
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}
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/* Assign new ASID to tsk */
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mm->context.asid = asid_cache;
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set_hw:
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write_aux_reg(ARC_REG_PID, hw_pid(mm) | MMU_ENABLE);
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local_irq_restore(flags);
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}
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/*
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* Initialize the context related info for a new mm_struct
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* instance.
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*/
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static inline int
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init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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mm->context.asid = MM_CTXT_NO_ASID;
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return 0;
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}
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/* Prepare the MMU for task: setup PID reg with allocated ASID
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If task doesn't have an ASID (never alloc or stolen, get a new ASID)
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*/
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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#ifndef CONFIG_SMP
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/* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */
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write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd);
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#endif
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get_new_mmu_context(next);
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}
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/*
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* Called at the time of execve() to get a new ASID
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* Note the subtlety here: get_new_mmu_context() behaves differently here
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* vs. in switch_mm(). Here it always returns a new ASID, because mm has
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* an unallocated "initial" value, while in latter, it moves to a new ASID,
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* only if it was unallocated
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*/
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#define activate_mm(prev, next) switch_mm(prev, next, NULL)
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static inline void destroy_context(struct mm_struct *mm)
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{
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mm->context.asid = MM_CTXT_NO_ASID;
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}
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/* it seemed that deactivate_mm( ) is a reasonable place to do book-keeping
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* for retiring-mm. However destroy_context( ) still needs to do that because
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* between mm_release( ) = >deactive_mm( ) and
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* mmput => .. => __mmdrop( ) => destroy_context( )
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* there is a good chance that task gets sched-out/in, making it's ASID valid
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* again (this teased me for a whole day).
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*/
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#define deactivate_mm(tsk, mm) do { } while (0)
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#define enter_lazy_tlb(mm, tsk)
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#endif /* __ASM_ARC_MMU_CONTEXT_H */
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