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8e32c9671f
linux/drivers/pinctrl/sh-pfc
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Valentine Barshak 8e32c9671f pinctrl: sh-pfc: r8a7791: Add VIN pins 
This adds VIN[0-2] pinmux support to r8a7791 SoC.
VIN1 B mirror is also added along with the primary
configuration since it's the only one that provides
access to all 24 data bits on VIN1.

Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-01-07 16:48:50 +01:00
..
core.c sh-pfc: Support GPIO to IRQ mapping specified IRQ resources 2013-12-12 22:07:28 +01:00
core.h sh-pfc: Support GPIO to IRQ mapping specified IRQ resources 2013-12-12 22:07:28 +01:00
gpio.c pinctrl: sh-pfc: Constify IRQ GPIOs arrays 2013-12-20 12:26:54 +01:00
Kconfig pinctrl: sh-pfc: r8a7791 PFC support 2013-10-27 16:40:52 +01:00
Makefile pinctrl: sh-pfc: r8a7791 PFC support 2013-10-27 16:40:52 +01:00
pfc-r8a73a4.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-r8a7740.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-r8a7778.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-r8a7779.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-r8a7790.c pinctrl: sh-pfc: r8a7790: Fix vsync value in the vin3_sync_mux array 2014-01-07 16:48:35 +01:00
pfc-r8a7791.c pinctrl: sh-pfc: r8a7791: Add VIN pins 2014-01-07 16:48:50 +01:00
pfc-sh73a0.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-sh7203.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7264.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7269.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7372.c pinctrl: sh-pfc: ARM: Constify pins and cfg_regs arrays 2013-12-20 12:28:40 +01:00
pfc-sh7720.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7722.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7723.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7724.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7734.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7757.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7785.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-sh7786.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pfc-shx3.c pinctrl: sh-pfc: sh: Constify pins and cfg_regs arrays 2013-12-20 12:27:43 +01:00
pinctrl.c pinctrl: Pass all configs to driver on pin_config_set() 2013-08-28 13:34:41 +02:00
sh_pfc.h pinctrl: sh-pfc: Constify IRQ GPIOs arrays 2013-12-20 12:26:54 +01:00