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50fdb52a7c
Extend the k3dma driver binding to support hisi-asp hardware variants. Cc: Vinod Koul <vkoul@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Tanglei Han <hantanglei@huawei.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: dmaengine@vger.kernel.org Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Youlin Wang <wwx575822@notesmail.huawei.com> Signed-off-by: Tanglei Han <hantanglei@huawei.com> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
48 lines
1.2 KiB
Plaintext
48 lines
1.2 KiB
Plaintext
* Hisilicon K3 DMA controller
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See dma.txt first
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Required properties:
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- compatible: Must be one of
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- "hisilicon,k3-dma-1.0"
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- "hisilicon,hisi-pcm-asp-dma-1.0"
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- reg: Should contain DMA registers location and length.
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- interrupts: Should contain one interrupt shared by all channel
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- #dma-cells: see dma.txt, should be 1, para number
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- dma-channels: physical channels supported
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- dma-requests: virtual channels supported, each virtual channel
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have specific request line
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- clocks: clock required
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Example:
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Controller:
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dma0: dma@fcd02000 {
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compatible = "hisilicon,k3-dma-1.0";
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reg = <0xfcd02000 0x1000>;
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#dma-cells = <1>;
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dma-channels = <16>;
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dma-requests = <27>;
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interrupts = <0 12 4>;
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clocks = <&pclk>;
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};
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Client:
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Use specific request line passing from dmax
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For example, i2c0 read channel request line is 18, while write channel use 19
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i2c0: i2c@fcb08000 {
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compatible = "snps,designware-i2c";
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dmas = <&dma0 18 /* read channel */
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&dma0 19>; /* write channel */
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dma-names = "rx", "tx";
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};
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i2c1: i2c@fcb09000 {
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compatible = "snps,designware-i2c";
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dmas = <&dma0 20 /* read channel */
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&dma0 21>; /* write channel */
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dma-names = "rx", "tx";
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};
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