Holger Brunck 067bb938da net/wan/fsl_ucc_hdlc: add hdlc-bus support ... This adds support for hdlc-bus mode to the fsl_ucc_hdlc driver. This can be enabled with the "fsl,hdlc-bus" property in the DTS node of the corresponding ucc. This aligns the configuration of the UPSMR and GUMR registers to what is done in our ucc_hdlc driver (that only support hdlc-bus mode) and with the QuickEngine's documentation for hdlc-bus mode. GUMR/SYNL is set to AUTO for the busmode as in this case the CD signal is ignored. The brkpt_support is enabled to set the HBM1 bit in the CMXUCR register to configure an open-drain connected HDLC bus. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Cc: Zhao Qiang <qiang.zhao@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2017-05-18 10:28:39 -04:00
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qe	net/wan/fsl_ucc_hdlc: add hdlc-bus support	2017-05-18 10:28:39 -04:00
bman.h	soc/fsl: Introduce DPAA 1.x BMan device driver	2016-09-25 02:38:58 -05:00
qman.h	soc/qman: add macros needed by caam/qi driver	2017-03-24 22:02:58 +08:00