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This patch adds host phy support to samsung-usbphy driver and further adds support for samsung's exynos5250 usb-phy. Signed-off-by: Praveen Paneri <p.paneri@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
56 lines
1.8 KiB
Plaintext
56 lines
1.8 KiB
Plaintext
* Samsung's usb phy transceiver
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The Samsung's phy transceiver is used for controlling usb phy for
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s3c-hsotg as well as ehci-s5p and ohci-exynos usb controllers
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across Samsung SOCs.
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TODO: Adding the PHY binding with controller(s) according to the under
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developement generic PHY driver.
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Required properties:
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Exynos4210:
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- compatible : should be "samsung,exynos4210-usbphy"
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- reg : base physical address of the phy registers and length of memory mapped
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region.
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Exynos5250:
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- compatible : should be "samsung,exynos5250-usbphy"
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- reg : base physical address of the phy registers and length of memory mapped
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region.
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Optional properties:
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- #address-cells: should be '1' when usbphy node has a child node with 'reg'
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property.
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- #size-cells: should be '1' when usbphy node has a child node with 'reg'
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property.
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- ranges: allows valid translation between child's address space and parent's
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address space.
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- The child node 'usbphy-sys' to the node 'usbphy' is for the system controller
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interface for usb-phy. It should provide the following information required by
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usb-phy controller to control phy.
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- reg : base physical address of PHY_CONTROL registers.
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The size of this register is the total sum of size of all PHY_CONTROL
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registers that the SoC has. For example, the size will be
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'0x4' in case we have only one PHY_CONTROL register (e.g.
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OTHERS register in S3C64XX or USB_PHY_CONTROL register in S5PV210)
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and, '0x8' in case we have two PHY_CONTROL registers (e.g.
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USBDEVICE_PHY_CONTROL and USBHOST_PHY_CONTROL registers in exynos4x).
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and so on.
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Example:
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- Exynos4210
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usbphy@125B0000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "samsung,exynos4210-usbphy";
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reg = <0x125B0000 0x100>;
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ranges;
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usbphy-sys {
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/* USB device and host PHY_CONTROL registers */
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reg = <0x10020704 0x8>;
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};
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};
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