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80018bd9cb
The chip is also an 8 bit shift register which works out of the box as a GPO expander with this patch Signed-off-by: Nicolas Saenz Julienne <nicolassaenzj@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
199 lines
4.8 KiB
C
199 lines
4.8 KiB
C
/*
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* 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
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*
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* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/mutex.h>
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#include <linux/spi/spi.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <linux/slab.h>
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#include <linux/module.h>
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#define GEN_74X164_NUMBER_GPIOS 8
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struct gen_74x164_chip {
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struct gpio_chip gpio_chip;
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struct mutex lock;
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u32 registers;
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/*
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* Since the registers are chained, every byte sent will make
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* the previous byte shift to the next register in the
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* chain. Thus, the first byte sent will end up in the last
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* register at the end of the transfer. So, to have a logical
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* numbering, store the bytes in reverse order.
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*/
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u8 buffer[0];
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};
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static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
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{
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struct spi_transfer xfer = {
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.tx_buf = chip->buffer,
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.len = chip->registers,
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};
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return spi_sync_transfer(to_spi_device(chip->gpio_chip.parent),
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&xfer, 1);
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}
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static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
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{
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struct gen_74x164_chip *chip = gpiochip_get_data(gc);
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u8 bank = chip->registers - 1 - offset / 8;
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u8 pin = offset % 8;
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int ret;
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mutex_lock(&chip->lock);
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ret = (chip->buffer[bank] >> pin) & 0x1;
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mutex_unlock(&chip->lock);
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return ret;
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}
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static void gen_74x164_set_value(struct gpio_chip *gc,
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unsigned offset, int val)
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{
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struct gen_74x164_chip *chip = gpiochip_get_data(gc);
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u8 bank = chip->registers - 1 - offset / 8;
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u8 pin = offset % 8;
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mutex_lock(&chip->lock);
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if (val)
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chip->buffer[bank] |= (1 << pin);
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else
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chip->buffer[bank] &= ~(1 << pin);
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__gen_74x164_write_config(chip);
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mutex_unlock(&chip->lock);
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}
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static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
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unsigned long *bits)
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{
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struct gen_74x164_chip *chip = gpiochip_get_data(gc);
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unsigned int i, idx, shift;
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u8 bank, bankmask;
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mutex_lock(&chip->lock);
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for (i = 0, bank = chip->registers - 1; i < chip->registers;
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i++, bank--) {
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idx = i / sizeof(*mask);
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shift = i % sizeof(*mask) * BITS_PER_BYTE;
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bankmask = mask[idx] >> shift;
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if (!bankmask)
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continue;
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chip->buffer[bank] &= ~bankmask;
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chip->buffer[bank] |= bankmask & (bits[idx] >> shift);
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}
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__gen_74x164_write_config(chip);
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mutex_unlock(&chip->lock);
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}
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static int gen_74x164_direction_output(struct gpio_chip *gc,
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unsigned offset, int val)
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{
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gen_74x164_set_value(gc, offset, val);
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return 0;
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}
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static int gen_74x164_probe(struct spi_device *spi)
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{
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struct gen_74x164_chip *chip;
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u32 nregs;
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int ret;
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/*
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* bits_per_word cannot be configured in platform data
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*/
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spi->bits_per_word = 8;
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ret = spi_setup(spi);
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if (ret < 0)
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return ret;
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if (of_property_read_u32(spi->dev.of_node, "registers-number",
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&nregs)) {
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dev_err(&spi->dev,
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"Missing registers-number property in the DT.\n");
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return -EINVAL;
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}
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chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
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if (!chip)
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return -ENOMEM;
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spi_set_drvdata(spi, chip);
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chip->gpio_chip.label = spi->modalias;
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chip->gpio_chip.direction_output = gen_74x164_direction_output;
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chip->gpio_chip.get = gen_74x164_get_value;
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chip->gpio_chip.set = gen_74x164_set_value;
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chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
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chip->gpio_chip.base = -1;
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chip->registers = nregs;
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chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
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chip->gpio_chip.can_sleep = true;
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chip->gpio_chip.parent = &spi->dev;
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chip->gpio_chip.owner = THIS_MODULE;
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mutex_init(&chip->lock);
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ret = __gen_74x164_write_config(chip);
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if (ret) {
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dev_err(&spi->dev, "Failed writing: %d\n", ret);
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goto exit_destroy;
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}
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ret = gpiochip_add_data(&chip->gpio_chip, chip);
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if (!ret)
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return 0;
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exit_destroy:
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mutex_destroy(&chip->lock);
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return ret;
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}
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static int gen_74x164_remove(struct spi_device *spi)
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{
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struct gen_74x164_chip *chip = spi_get_drvdata(spi);
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gpiochip_remove(&chip->gpio_chip);
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mutex_destroy(&chip->lock);
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return 0;
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}
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static const struct of_device_id gen_74x164_dt_ids[] = {
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{ .compatible = "fairchild,74hc595" },
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{ .compatible = "nxp,74lvc594" },
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{},
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};
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MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
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static struct spi_driver gen_74x164_driver = {
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.driver = {
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.name = "74x164",
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.of_match_table = gen_74x164_dt_ids,
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},
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.probe = gen_74x164_probe,
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.remove = gen_74x164_remove,
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};
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module_spi_driver(gen_74x164_driver);
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MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
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MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
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MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
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MODULE_LICENSE("GPL v2");
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