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Core code: - Make the managed interrupts more robust by shutting them down in the core code when the assigned affinity mask does not contain online CPUs. - Make the irq simulator chip work on RT - A small set of cpumask and power manageent cleanups Drivers: - A set of changes which mark GPIO interrupt chips immutable to prevent the GPIO subsystem from modifying it under the hood. This provides the necessary infrastructure and converts a set of GPIO and pinctrl drivers over. - A set of changes to make the pseudo-NMI handling for GICv3 more robust: a missing barrier and consistent handling of the priority mask. - Another set of GICv3 improvements and fixes, but nothing outstanding - The usual set of improvements and cleanups all over the place - No new irqchip drivers and not even a new device tree binding! 100+ interrupt chips are truly enough. -----BEGIN PGP SIGNATURE----- iQJHBAABCgAxFiEEQp8+kY+LLUocC4bMphj1TA10mKEFAmKLOEoTHHRnbHhAbGlu dXRyb25peC5kZQAKCRCmGPVMDXSYoQ4ED/9B1kDwunvkNAPJDmSmr4hFU7EU3ZLb SyS2099PWekgU3TaWdD6eILm9hIvsAmmhbU7CJ0EWol6G5VsqbNoYsfOsWliuGTi CL3ygZL84hL4b24c3sipqWAF60WCEKLnYV7pb1DgiZM41C87+wxPB49FQbHVjroz WDRTF8QYWMqoTRvxGMCflDfkAwydlCrqzQwgyUB5hJj3vbiYX9dVMAkJmHRyM3Uq Prwhx1Ipbj/wBSReIbIXlNx4XI/iUDI0UWeh02XkVxLb5Jzg7vPCHiuyVMR1DW2J oEjAR+/1sGwVOoRnfRlwdRUmRRItdlbopbL4CuhO/ENrM/r/o/rMvDDMwF4WoMW9 zXvzFBLllVpLvyFvVHO1LKI6Hx2mdyAmQ1M/TxMFOmHAyfOPtN150AJDPKdCrMk/ 0F0B0y/KPgU9P/Q9yLh2UiXRAkoUBpLpk20xZbAUGHnjXXkys4Z2fE+THIob+Ibe pUnXsgCXVVWyqJjdikPF2gqsSsCFUo7iblHRzI0hzOAPe3MTph0qh3hZoFAFNEYP IIyAv9+IiT1EvBMgjHNmZ51U0uTbt3qWOSxebEoU3a598wwEVNRRVyutqvREXhl8 inkzpL2N3uBPX7sA25lYkH4QKRbzVoNkF/s0e/J9WZdYbj3SsxGouoGdYA2xgvtM 8tiCnFC9hfzepQ== =xcXv -----END PGP SIGNATURE----- Merge tag 'irq-core-2022-05-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull interrupt handling updates from Thomas Gleixner: "Core code: - Make the managed interrupts more robust by shutting them down in the core code when the assigned affinity mask does not contain online CPUs. - Make the irq simulator chip work on RT - A small set of cpumask and power manageent cleanups Drivers: - A set of changes which mark GPIO interrupt chips immutable to prevent the GPIO subsystem from modifying it under the hood. This provides the necessary infrastructure and converts a set of GPIO and pinctrl drivers over. - A set of changes to make the pseudo-NMI handling for GICv3 more robust: a missing barrier and consistent handling of the priority mask. - Another set of GICv3 improvements and fixes, but nothing outstanding - The usual set of improvements and cleanups all over the place - No new irqchip drivers and not even a new device tree binding! 100+ interrupt chips are truly enough" * tag 'irq-core-2022-05-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (39 commits) irqchip: Add Kconfig symbols for sunxi drivers irqchip/gic-v3: Fix priority mask handling irqchip/gic-v3: Refactor ISB + EOIR at ack time irqchip/gic-v3: Ensure pseudo-NMIs have an ISB between ack and handling genirq/irq_sim: Make the irq_work always run in hard irq context irqchip/armada-370-xp: Do not touch Performance Counter Overflow on A375, A38x, A39x irqchip/gic: Improved warning about incorrect type irqchip/csky: Return true/false (not 1/0) from bool functions irqchip/imx-irqsteer: Add runtime PM support irqchip/imx-irqsteer: Constify irq_chip struct irqchip/armada-370-xp: Enable MSI affinity configuration irqchip/aspeed-scu-ic: Fix irq_of_parse_and_map() return value irqchip/aspeed-i2c-ic: Fix irq_of_parse_and_map() return value irqchip/sun6i-r: Use NULL for chip_data irqchip/xtensa-mx: Fix initial IRQ affinity in non-SMP setup irqchip/exiu: Fix acknowledgment of edge triggered interrupts irqchip/gic-v3: Claim iomem resources dt-bindings: interrupt-controller: arm,gic-v3: Make the v2 compat requirements explicit irqchip/gic-v3: Relax polling of GIC{R,D}_CTLR.RWP irqchip/gic-v3: Detect LPI invalidation MMIO registers ... |
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actions | ||
aspeed | ||
bcm | ||
berlin | ||
cirrus | ||
freescale | ||
intel | ||
mediatek | ||
meson | ||
mvebu | ||
nomadik | ||
nuvoton | ||
pxa | ||
qcom | ||
ralink | ||
renesas | ||
samsung | ||
spear | ||
sprd | ||
stm32 | ||
sunplus | ||
sunxi | ||
tegra | ||
ti | ||
uniphier | ||
visconti | ||
vt8500 | ||
core.c | ||
core.h | ||
devicetree.c | ||
devicetree.h | ||
Kconfig | ||
Makefile | ||
pinconf-generic.c | ||
pinconf.c | ||
pinconf.h | ||
pinctrl-amd.c | ||
pinctrl-amd.h | ||
pinctrl-apple-gpio.c | ||
pinctrl-artpec6.c | ||
pinctrl-as3722.c | ||
pinctrl-at91-pio4.c | ||
pinctrl-at91.c | ||
pinctrl-at91.h | ||
pinctrl-axp209.c | ||
pinctrl-bm1880.c | ||
pinctrl-da850-pupd.c | ||
pinctrl-da9062.c | ||
pinctrl-digicolor.c | ||
pinctrl-equilibrium.c | ||
pinctrl-equilibrium.h | ||
pinctrl-falcon.c | ||
pinctrl-gemini.c | ||
pinctrl-ingenic.c | ||
pinctrl-k210.c | ||
pinctrl-keembay.c | ||
pinctrl-lantiq.c | ||
pinctrl-lantiq.h | ||
pinctrl-lpc18xx.c | ||
pinctrl-max77620.c | ||
pinctrl-mcp23s08_i2c.c | ||
pinctrl-mcp23s08_spi.c | ||
pinctrl-mcp23s08.c | ||
pinctrl-mcp23s08.h | ||
pinctrl-microchip-sgpio.c | ||
pinctrl-ocelot.c | ||
pinctrl-oxnas.c | ||
pinctrl-palmas.c | ||
pinctrl-pic32.c | ||
pinctrl-pic32.h | ||
pinctrl-pistachio.c | ||
pinctrl-rk805.c | ||
pinctrl-rockchip.c | ||
pinctrl-rockchip.h | ||
pinctrl-single.c | ||
pinctrl-st.c | ||
pinctrl-starfive.c | ||
pinctrl-stmfx.c | ||
pinctrl-sx150x.c | ||
pinctrl-tb10x.c | ||
pinctrl-thunderbay.c | ||
pinctrl-utils.c | ||
pinctrl-utils.h | ||
pinctrl-xway.c | ||
pinctrl-zynq.c | ||
pinctrl-zynqmp.c | ||
pinmux.c | ||
pinmux.h |