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The high-speed phy on qcom SoCs is controlled via the ULPI viewport. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: <devicetree@vger.kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
85 lines
2.3 KiB
Plaintext
85 lines
2.3 KiB
Plaintext
Qualcomm's USB HS PHY
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PROPERTIES
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- compatible:
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Usage: required
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Value type: <string>
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Definition: Should contain "qcom,usb-hs-phy" and more specifically one of the
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following:
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"qcom,usb-hs-phy-apq8064"
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"qcom,usb-hs-phy-msm8916"
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"qcom,usb-hs-phy-msm8974"
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- #phy-cells:
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Usage: required
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Value type: <u32>
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Definition: Should contain 0
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- clocks:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Should contain clock specifier for the reference and sleep
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clocks
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- clock-names:
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Usage: required
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Value type: <stringlist>
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Definition: Should contain "ref" and "sleep" for the reference and sleep
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clocks respectively
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- resets:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Should contain the phy and POR resets
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- reset-names:
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Usage: required
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Value type: <stringlist>
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Definition: Should contain "phy" and "por" for the phy and POR resets
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respectively
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- v3p3-supply:
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Usage: required
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Value type: <phandle>
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Definition: Should contain a reference to the 3.3V supply
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- v1p8-supply:
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Usage: required
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Value type: <phandle>
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Definition: Should contain a reference to the 1.8V supply
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- extcon:
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Usage: optional
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Value type: <prop-encoded-array>
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Definition: Should contain the vbus extcon
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- qcom,init-seq:
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Usage: optional
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Value type: <u8 array>
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Definition: Should contain a sequence of ULPI address and value pairs to
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program into the ULPI_EXT_VENDOR_SPECIFIC area. This is related
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to Device Mode Eye Diagram test. The addresses are offsets
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from the ULPI_EXT_VENDOR_SPECIFIC address, for example,
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<0x1 0x53> would mean "write the value 0x53 to address 0x81".
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EXAMPLE
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otg: usb-controller {
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ulpi {
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phy {
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compatible = "qcom,usb-hs-phy-msm8974", "qcom,usb-hs-phy";
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#phy-cells = <0>;
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clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
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clock-names = "ref", "sleep";
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resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>;
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reset-names = "phy", "por";
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v3p3-supply = <&pm8941_l24>;
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v1p8-supply = <&pm8941_l6>;
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extcon = <&smbb>;
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qcom,init-seq = /bits/ 8 <0x1 0x63>;
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};
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};
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};
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