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cfb80c9eae
swiotlb on 32 bit will be used by Xen domain 0 support. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
52 lines
1.4 KiB
C
52 lines
1.4 KiB
C
#ifndef _ASM_X86_PCI_64_H
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#define _ASM_X86_PCI_64_H
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#ifdef __KERNEL__
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#ifdef CONFIG_CALGARY_IOMMU
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static inline void *pci_iommu(struct pci_bus *bus)
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{
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struct pci_sysdata *sd = bus->sysdata;
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return sd->iommu;
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}
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static inline void set_pci_iommu(struct pci_bus *bus, void *val)
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{
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struct pci_sysdata *sd = bus->sysdata;
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sd->iommu = val;
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}
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#endif /* CONFIG_CALGARY_IOMMU */
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extern int (*pci_config_read)(int seg, int bus, int dev, int fn,
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int reg, int len, u32 *value);
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extern int (*pci_config_write)(int seg, int bus, int dev, int fn,
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int reg, int len, u32 value);
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extern void dma32_reserve_bootmem(void);
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/* The PCI address space does equal the physical memory
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* address space. The networking and block device layers use
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* this boolean for bounce buffer decisions
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*
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* On AMD64 it mostly equals, but we set it to zero if a hardware
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* IOMMU (gart) of sotware IOMMU (swiotlb) is available.
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*/
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#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
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#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
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dma_addr_t ADDR_NAME;
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#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
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__u32 LEN_NAME;
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#define pci_unmap_addr(PTR, ADDR_NAME) \
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((PTR)->ADDR_NAME)
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#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
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(((PTR)->ADDR_NAME) = (VAL))
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#define pci_unmap_len(PTR, LEN_NAME) \
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((PTR)->LEN_NAME)
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#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
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(((PTR)->LEN_NAME) = (VAL))
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#endif /* __KERNEL__ */
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#endif /* _ASM_X86_PCI_64_H */
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