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bffdd7d1a4
This patch fixup miss-setting of SMSC IRQ number. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
101 lines
2.1 KiB
Plaintext
101 lines
2.1 KiB
Plaintext
/*
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* Reference Device Tree Source for the Marzen board
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Copyright (C) 2013 Simon Horman
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/dts-v1/;
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/include/ "r8a7779.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "marzen";
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compatible = "renesas,marzen-reference", "renesas,r8a7779";
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chosen {
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bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on rw";
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};
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memory {
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device_type = "memory";
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reg = <0x60000000 0x40000000>;
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};
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fixedregulator3v3: fixedregulator@0 {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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lan0@18000000 {
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compatible = "smsc,lan9220", "smsc,lan9115";
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reg = <0x18000000 0x100>;
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pinctrl-0 = <&lan0_pins>;
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pinctrl-names = "default";
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phy-mode = "mii";
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interrupt-parent = <&irqpin0>;
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interrupts = <1 0>; /* IRQ1: hwirq 1 on irqpin0 */
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reg-io-width = <4>;
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vddvario-supply = <&fixedregulator3v3>;
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vdd33a-supply = <&fixedregulator3v3>;
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};
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leds {
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compatible = "gpio-leds";
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led2 {
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gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
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};
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led3 {
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gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
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};
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led4 {
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gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&irqpin0 {
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status = "okay";
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};
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&pfc {
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pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
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pinctrl-names = "default";
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lan0_pins: lan0 {
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intc {
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renesas,groups = "intc_irq1_b";
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renesas,function = "intc";
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};
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lbsc {
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renesas,groups = "lbsc_ex_cs0";
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renesas,function = "lbsc";
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};
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};
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scif2_pins: scif2 {
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renesas,groups = "scif2_data_c";
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renesas,function = "scif2";
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};
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scif4_pins: scif4 {
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renesas,groups = "scif4_data";
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renesas,function = "scif4";
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};
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sdhi0_pins: sdhi0 {
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renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
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"sdhi0_wp";
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renesas,function = "sdhi0";
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};
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};
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