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89b8da06ba
After commit 02b4e2756e (ARM: v7 setup function should invalidate L1
cache) the soc specific secondary_startup is removed, causing build
failures:
../arch/arm/mach-socfpga/platsmp.c: In function 'socfpga_a10_boot_secondary':
../arch/arm/mach-socfpga/platsmp.c:66:140: error: 'socfpga_secondary_startup' undeclared (first use in this function)
../arch/arm/mach-socfpga/platsmp.c:66:140: note: each undeclared identifier is reported only once for each function it appears in
To fix, use the generic secondary_startup.
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
127 lines
3.5 KiB
C
127 lines
3.5 KiB
C
/*
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* Copyright 2010-2011 Calxeda, Inc.
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* Copyright 2012 Pavel Machek <pavel@denx.de>
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* Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
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* Copyright (C) 2012 Altera Corporation
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_scu.h>
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#include <asm/smp_plat.h>
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#include "core.h"
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static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
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if (socfpga_cpu1start_addr) {
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/* This will put CPU #1 into reset. */
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writel(RSTMGR_MPUMODRST_CPU1,
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rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
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memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
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writel(virt_to_phys(socfpga_secondary_startup),
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sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff));
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flush_cache_all();
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smp_wmb();
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outer_clean_range(0, trampoline_size);
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/* This will release CPU #1 out of reset. */
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writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
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}
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return 0;
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}
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static int socfpga_a10_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
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if (socfpga_cpu1start_addr) {
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writel(RSTMGR_MPUMODRST_CPU1, rst_manager_base_addr +
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SOCFPGA_A10_RSTMGR_MODMPURST);
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memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
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writel(virt_to_phys(secondary_startup),
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sys_manager_base_addr + (socfpga_cpu1start_addr & 0x00000fff));
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flush_cache_all();
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smp_wmb();
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outer_clean_range(0, trampoline_size);
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/* This will release CPU #1 out of reset. */
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writel(0, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_MODMPURST);
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}
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return 0;
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}
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static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
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{
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struct device_node *np;
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void __iomem *socfpga_scu_base_addr;
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np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
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if (!np) {
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pr_err("%s: missing scu\n", __func__);
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return;
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}
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socfpga_scu_base_addr = of_iomap(np, 0);
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if (!socfpga_scu_base_addr)
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return;
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scu_enable(socfpga_scu_base_addr);
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}
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/*
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* platform-specific code to shutdown a CPU
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*
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* Called with IRQs disabled
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*/
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static void socfpga_cpu_die(unsigned int cpu)
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{
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/* Do WFI. If we wake up early, go back into WFI */
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while (1)
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cpu_do_idle();
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}
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static struct smp_operations socfpga_smp_ops __initdata = {
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.smp_prepare_cpus = socfpga_smp_prepare_cpus,
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.smp_boot_secondary = socfpga_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = socfpga_cpu_die,
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#endif
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};
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static struct smp_operations socfpga_a10_smp_ops __initdata = {
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.smp_prepare_cpus = socfpga_smp_prepare_cpus,
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.smp_boot_secondary = socfpga_a10_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_die = socfpga_cpu_die,
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#endif
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};
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CPU_METHOD_OF_DECLARE(socfpga_smp, "altr,socfpga-smp", &socfpga_smp_ops);
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CPU_METHOD_OF_DECLARE(socfpga_a10_smp, "altr,socfpga-a10-smp", &socfpga_a10_smp_ops);
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