mirror of
https://github.com/torvalds/linux.git
synced 2024-11-05 11:32:04 +00:00
91a6151be2
This patch adds some documentation on the different cpu families supported by arch/powerpc. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
222 lines
6.0 KiB
Plaintext
222 lines
6.0 KiB
Plaintext
CPU Families
|
|
============
|
|
|
|
This document tries to summarise some of the different cpu families that exist
|
|
and are supported by arch/powerpc.
|
|
|
|
|
|
Book3S (aka sPAPR)
|
|
------------------
|
|
|
|
- Hash MMU
|
|
- Mix of 32 & 64 bit
|
|
|
|
+--------------+ +----------------+
|
|
| Old POWER | --------------> | RS64 (threads) |
|
|
+--------------+ +----------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+ +----------------+ +------+
|
|
| 601 | --------------> | 603 | ---> | e300 |
|
|
+--------------+ +----------------+ +------+
|
|
| |
|
|
| |
|
|
v v
|
|
+--------------+ +----------------+ +-------+
|
|
| 604 | | 750 (G3) | ---> | 750CX |
|
|
+--------------+ +----------------+ +-------+
|
|
| | |
|
|
| | |
|
|
v v v
|
|
+--------------+ +----------------+ +-------+
|
|
| 620 (64 bit) | | 7400 | | 750CL |
|
|
+--------------+ +----------------+ +-------+
|
|
| | |
|
|
| | |
|
|
v v v
|
|
+--------------+ +----------------+ +-------+
|
|
| POWER3/630 | | 7410 | | 750FX |
|
|
+--------------+ +----------------+ +-------+
|
|
| |
|
|
| |
|
|
v v
|
|
+--------------+ +----------------+
|
|
| POWER3+ | | 7450 |
|
|
+--------------+ +----------------+
|
|
| |
|
|
| |
|
|
v v
|
|
+--------------+ +----------------+
|
|
| POWER4 | | 7455 |
|
|
+--------------+ +----------------+
|
|
| |
|
|
| |
|
|
v v
|
|
+--------------+ +-------+ +----------------+
|
|
| POWER4+ | --> | 970 | | 7447 |
|
|
+--------------+ +-------+ +----------------+
|
|
| | |
|
|
| | |
|
|
v v v
|
|
+--------------+ +-------+ +----------------+
|
|
| POWER5 | | 970FX | | 7448 |
|
|
+--------------+ +-------+ +----------------+
|
|
| | |
|
|
| | |
|
|
v v v
|
|
+--------------+ +-------+ +----------------+
|
|
| POWER5+ | | 970MP | | e600 |
|
|
+--------------+ +-------+ +----------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| POWER5++ |
|
|
+--------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+ +-------+
|
|
| POWER6 | <-?-> | Cell |
|
|
+--------------+ +-------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| POWER7 |
|
|
+--------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| POWER7+ |
|
|
+--------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| POWER8 |
|
|
+--------------+
|
|
|
|
|
|
+---------------+
|
|
| PA6T (64 bit) |
|
|
+---------------+
|
|
|
|
|
|
IBM BookE
|
|
---------
|
|
|
|
- Software loaded TLB.
|
|
- All 32 bit
|
|
|
|
+--------------+
|
|
| 401 |
|
|
+--------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| 403 |
|
|
+--------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| 405 |
|
|
+--------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| 440 |
|
|
+--------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+ +----------------+
|
|
| 450 | --> | BG/P |
|
|
+--------------+ +----------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| 460 |
|
|
+--------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| 476 |
|
|
+--------------+
|
|
|
|
|
|
Motorola/Freescale 8xx
|
|
----------------------
|
|
|
|
- Software loaded with hardware assist.
|
|
- All 32 bit
|
|
|
|
+-------------+
|
|
| MPC8xx Core |
|
|
+-------------+
|
|
|
|
|
|
Freescale BookE
|
|
---------------
|
|
|
|
- Software loaded TLB.
|
|
- e6500 adds HW loaded indirect TLB entries.
|
|
- Mix of 32 & 64 bit
|
|
|
|
+--------------+
|
|
| e200 |
|
|
+--------------+
|
|
|
|
|
|
+--------------------------------+
|
|
| e500 |
|
|
+--------------------------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------------------------+
|
|
| e500v2 |
|
|
+--------------------------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------------------------+
|
|
| e500mc (Book3e) |
|
|
+--------------------------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------------------------+
|
|
| e5500 (64 bit) |
|
|
+--------------------------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------------------------+
|
|
| e6500 (HW TLB) (Multithreaded) |
|
|
+--------------------------------+
|
|
|
|
|
|
IBM A2 core
|
|
-----------
|
|
|
|
- Book3E, software loaded TLB + HW loaded indirect TLB entries.
|
|
- 64 bit
|
|
|
|
+--------------+ +----------------+
|
|
| A2 core | --> | WSP |
|
|
+--------------+ +----------------+
|
|
|
|
|
|
|
|
v
|
|
+--------------+
|
|
| BG/Q |
|
|
+--------------+
|