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This is driver for Turtle Beach Multisound cards: Classic, Fiji and Pinnacle. Tested pcm playback and recording and MIDI playback on Multisound Pinnacle. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Takashi Iwai <tiwai@suse.de>
309 lines
7.9 KiB
C
309 lines
7.9 KiB
C
/*********************************************************************
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*
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* msnd.h
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*
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* Turtle Beach MultiSound Sound Card Driver for Linux
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*
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* Some parts of this header file were derived from the Turtle Beach
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* MultiSound Driver Development Kit.
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*
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* Copyright (C) 1998 Andrew Veliath
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* Copyright (C) 1993 Turtle Beach Systems, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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********************************************************************/
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#ifndef __MSND_H
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#define __MSND_H
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#define DEFSAMPLERATE 44100
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#define DEFSAMPLESIZE SNDRV_PCM_FORMAT_S16
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#define DEFCHANNELS 1
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#define SRAM_BANK_SIZE 0x8000
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#define SRAM_CNTL_START 0x7F00
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#define SMA_STRUCT_START 0x7F40
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#define DSP_BASE_ADDR 0x4000
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#define DSP_BANK_BASE 0x4000
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#define AGND 0x01
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#define SIGNAL 0x02
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#define EXT_DSP_BIT_DCAL 0x0001
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#define EXT_DSP_BIT_MIDI_CON 0x0002
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#define BUFFSIZE 0x8000
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#define HOSTQ_SIZE 0x40
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#define DAP_BUFF_SIZE 0x2400
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#define DAPQ_STRUCT_SIZE 0x10
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#define DARQ_STRUCT_SIZE 0x10
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#define DAPQ_BUFF_SIZE (3 * 0x10)
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#define DARQ_BUFF_SIZE (3 * 0x10)
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#define MODQ_BUFF_SIZE 0x400
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#define DAPQ_DATA_BUFF 0x6C00
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#define DARQ_DATA_BUFF 0x6C30
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#define MODQ_DATA_BUFF 0x6C60
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#define MIDQ_DATA_BUFF 0x7060
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#define DAPQ_OFFSET SRAM_CNTL_START
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#define DARQ_OFFSET (SRAM_CNTL_START + 0x08)
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#define MODQ_OFFSET (SRAM_CNTL_START + 0x10)
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#define MIDQ_OFFSET (SRAM_CNTL_START + 0x18)
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#define DSPQ_OFFSET (SRAM_CNTL_START + 0x20)
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#define HP_ICR 0x00
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#define HP_CVR 0x01
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#define HP_ISR 0x02
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#define HP_IVR 0x03
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#define HP_NU 0x04
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#define HP_INFO 0x04
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#define HP_TXH 0x05
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#define HP_RXH 0x05
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#define HP_TXM 0x06
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#define HP_RXM 0x06
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#define HP_TXL 0x07
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#define HP_RXL 0x07
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#define HP_ICR_DEF 0x00
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#define HP_CVR_DEF 0x12
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#define HP_ISR_DEF 0x06
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#define HP_IVR_DEF 0x0f
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#define HP_NU_DEF 0x00
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#define HP_IRQM 0x09
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#define HPR_BLRC 0x08
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#define HPR_SPR1 0x09
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#define HPR_SPR2 0x0A
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#define HPR_TCL0 0x0B
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#define HPR_TCL1 0x0C
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#define HPR_TCL2 0x0D
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#define HPR_TCL3 0x0E
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#define HPR_TCL4 0x0F
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#define HPICR_INIT 0x80
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#define HPICR_HM1 0x40
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#define HPICR_HM0 0x20
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#define HPICR_HF1 0x10
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#define HPICR_HF0 0x08
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#define HPICR_TREQ 0x02
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#define HPICR_RREQ 0x01
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#define HPCVR_HC 0x80
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#define HPISR_HREQ 0x80
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#define HPISR_DMA 0x40
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#define HPISR_HF3 0x10
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#define HPISR_HF2 0x08
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#define HPISR_TRDY 0x04
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#define HPISR_TXDE 0x02
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#define HPISR_RXDF 0x01
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#define HPIO_290 0
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#define HPIO_260 1
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#define HPIO_250 2
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#define HPIO_240 3
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#define HPIO_230 4
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#define HPIO_220 5
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#define HPIO_210 6
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#define HPIO_3E0 7
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#define HPMEM_NONE 0
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#define HPMEM_B000 1
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#define HPMEM_C800 2
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#define HPMEM_D000 3
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#define HPMEM_D400 4
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#define HPMEM_D800 5
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#define HPMEM_E000 6
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#define HPMEM_E800 7
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#define HPIRQ_NONE 0
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#define HPIRQ_5 1
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#define HPIRQ_7 2
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#define HPIRQ_9 3
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#define HPIRQ_10 4
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#define HPIRQ_11 5
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#define HPIRQ_12 6
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#define HPIRQ_15 7
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#define HIMT_PLAY_DONE 0x00
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#define HIMT_RECORD_DONE 0x01
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#define HIMT_MIDI_EOS 0x02
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#define HIMT_MIDI_OUT 0x03
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#define HIMT_MIDI_IN_UCHAR 0x0E
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#define HIMT_DSP 0x0F
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#define HDEX_BASE 0x92
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#define HDEX_PLAY_START (0 + HDEX_BASE)
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#define HDEX_PLAY_STOP (1 + HDEX_BASE)
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#define HDEX_PLAY_PAUSE (2 + HDEX_BASE)
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#define HDEX_PLAY_RESUME (3 + HDEX_BASE)
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#define HDEX_RECORD_START (4 + HDEX_BASE)
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#define HDEX_RECORD_STOP (5 + HDEX_BASE)
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#define HDEX_MIDI_IN_START (6 + HDEX_BASE)
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#define HDEX_MIDI_IN_STOP (7 + HDEX_BASE)
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#define HDEX_MIDI_OUT_START (8 + HDEX_BASE)
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#define HDEX_MIDI_OUT_STOP (9 + HDEX_BASE)
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#define HDEX_AUX_REQ (10 + HDEX_BASE)
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#define HDEXAR_CLEAR_PEAKS 1
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#define HDEXAR_IN_SET_POTS 2
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#define HDEXAR_AUX_SET_POTS 3
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#define HDEXAR_CAL_A_TO_D 4
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#define HDEXAR_RD_EXT_DSP_BITS 5
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/* Pinnacle only HDEXAR defs */
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#define HDEXAR_SET_ANA_IN 0
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#define HDEXAR_SET_SYNTH_IN 4
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#define HDEXAR_READ_DAT_IN 5
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#define HDEXAR_MIC_SET_POTS 6
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#define HDEXAR_SET_DAT_IN 7
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#define HDEXAR_SET_SYNTH_48 8
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#define HDEXAR_SET_SYNTH_44 9
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#define HIWORD(l) ((u16)((((u32)(l)) >> 16) & 0xFFFF))
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#define LOWORD(l) ((u16)(u32)(l))
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#define HIBYTE(w) ((u8)(((u16)(w) >> 8) & 0xFF))
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#define LOBYTE(w) ((u8)(w))
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#define MAKELONG(low, hi) ((long)(((u16)(low))|(((u32)((u16)(hi)))<<16)))
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#define MAKEWORD(low, hi) ((u16)(((u8)(low))|(((u16)((u8)(hi)))<<8)))
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#define PCTODSP_OFFSET(w) (u16)((w)/2)
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#define PCTODSP_BASED(w) (u16)(((w)/2) + DSP_BASE_ADDR)
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#define DSPTOPC_BASED(w) (((w) - DSP_BASE_ADDR) * 2)
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#ifdef SLOWIO
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# undef outb
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# undef inb
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# define outb outb_p
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# define inb inb_p
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#endif
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/* JobQueueStruct */
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#define JQS_wStart 0x00
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#define JQS_wSize 0x02
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#define JQS_wHead 0x04
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#define JQS_wTail 0x06
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#define JQS__size 0x08
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/* DAQueueDataStruct */
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#define DAQDS_wStart 0x00
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#define DAQDS_wSize 0x02
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#define DAQDS_wFormat 0x04
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#define DAQDS_wSampleSize 0x06
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#define DAQDS_wChannels 0x08
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#define DAQDS_wSampleRate 0x0A
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#define DAQDS_wIntMsg 0x0C
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#define DAQDS_wFlags 0x0E
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#define DAQDS__size 0x10
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#include <sound/pcm.h>
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struct snd_msnd {
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void __iomem *mappedbase;
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int play_period_bytes;
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int playLimit;
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int playPeriods;
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int playDMAPos;
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int banksPlayed;
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int captureDMAPos;
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int capturePeriodBytes;
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int captureLimit;
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int capturePeriods;
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struct snd_card *card;
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void *msndmidi_mpu;
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struct snd_rawmidi *rmidi;
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/* Hardware resources */
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long io;
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int memid, irqid;
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int irq, irq_ref;
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unsigned long base;
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/* Motorola 56k DSP SMA */
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void __iomem *SMA;
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void __iomem *DAPQ;
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void __iomem *DARQ;
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void __iomem *MODQ;
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void __iomem *MIDQ;
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void __iomem *DSPQ;
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int dspq_data_buff, dspq_buff_size;
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/* State variables */
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enum { msndClassic, msndPinnacle } type;
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mode_t mode;
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unsigned long flags;
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#define F_RESETTING 0
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#define F_HAVEDIGITAL 1
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#define F_AUDIO_WRITE_INUSE 2
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#define F_WRITING 3
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#define F_WRITEBLOCK 4
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#define F_WRITEFLUSH 5
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#define F_AUDIO_READ_INUSE 6
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#define F_READING 7
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#define F_READBLOCK 8
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#define F_EXT_MIDI_INUSE 9
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#define F_HDR_MIDI_INUSE 10
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#define F_DISABLE_WRITE_NDELAY 11
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spinlock_t lock;
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spinlock_t mixer_lock;
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int nresets;
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unsigned recsrc;
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#define LEVEL_ENTRIES 32
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int left_levels[LEVEL_ENTRIES];
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int right_levels[LEVEL_ENTRIES];
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int calibrate_signal;
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int play_sample_size, play_sample_rate, play_channels;
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int play_ndelay;
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int capture_sample_size, capture_sample_rate, capture_channels;
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int capture_ndelay;
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u8 bCurrentMidiPatch;
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int last_playbank, last_recbank;
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struct snd_pcm_substream *playback_substream;
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struct snd_pcm_substream *capture_substream;
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};
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void snd_msnd_init_queue(void *base, int start, int size);
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int snd_msnd_send_dsp_cmd(struct snd_msnd *chip, u8 cmd);
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int snd_msnd_send_word(struct snd_msnd *chip,
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unsigned char high,
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unsigned char mid,
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unsigned char low);
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int snd_msnd_upload_host(struct snd_msnd *chip,
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const u8 *bin, int len);
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int snd_msnd_enable_irq(struct snd_msnd *chip);
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int snd_msnd_disable_irq(struct snd_msnd *chip);
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void snd_msnd_dsp_halt(struct snd_msnd *chip, struct file *file);
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int snd_msnd_DAPQ(struct snd_msnd *chip, int start);
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int snd_msnd_DARQ(struct snd_msnd *chip, int start);
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int snd_msnd_pcm(struct snd_card *card, int device, struct snd_pcm **rpcm);
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int snd_msndmidi_new(struct snd_card *card, int device);
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void snd_msndmidi_input_read(void *mpu);
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void snd_msndmix_setup(struct snd_msnd *chip);
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int __devinit snd_msndmix_new(struct snd_card *card);
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int snd_msndmix_force_recsrc(struct snd_msnd *chip, int recsrc);
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#endif /* __MSND_H */
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