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f9aece7344
This patch adds initial pinctrl driver to support for the R8A7796 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [uli: rebased on top of renesas-drivers] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
175 lines
6.2 KiB
Plaintext
175 lines
6.2 KiB
Plaintext
* Renesas Pin Function Controller (GPIO and Pin Mux/Config)
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The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0,
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R8A73A4 and R8A7740 it also acts as a GPIO controller.
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Pin Control
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-----------
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Required Properties:
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- compatible: should be one of the following.
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- "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller.
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- "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller.
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- "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller.
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- "renesas,pfc-r8a7778": for R8A7778 (R-Mobile M1) compatible pin-controller.
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- "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.
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- "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.
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- "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
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- "renesas,pfc-r8a7792": for R8A7792 (R-Car V2H) compatible pin-controller.
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- "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
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- "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
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- "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
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- "renesas,pfc-r8a7796": for R8A7796 (R-Car M3-W) compatible pin-controller.
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- "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
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- reg: Base address and length of each memory resource used by the pin
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controller hardware module.
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Optional properties:
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- #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden
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otherwise. Should be 3.
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- interrupts-extended: Specify the interrupts associated with external
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IRQ pins. This property is mandatory when the PFC handles GPIOs and
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forbidden otherwise. When specified, it must contain one interrupt per
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external IRQ, sorted by external IRQ number.
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The PFC node also acts as a container for pin configuration nodes. Please refer
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to pinctrl-bindings.txt in this directory for the definition of the term "pin
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configuration node" and for the common pinctrl bindings used by client devices.
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Each pin configuration node represents a desired configuration for a pin, a
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pin group, or a list of pins or pin groups. The configuration can include the
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function to select on those pin(s) and pin configuration parameters (such as
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pull-up and pull-down).
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Pin configuration nodes contain pin configuration properties, either directly
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or grouped in child subnodes. Both pin muxing and configuration parameters can
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be grouped in that way and referenced as a single pin configuration node by
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client devices.
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A configuration node or subnode must reference at least one pin (through the
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pins or pin groups properties) and contain at least a function or one
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configuration parameter. When the function is present only pin groups can be
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used to reference pins.
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All pin configuration nodes and subnodes names are ignored. All of those nodes
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are parsed through phandles and processed purely based on their content.
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Pin Configuration Node Properties:
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- pins : An array of strings, each string containing the name of a pin.
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- groups : An array of strings, each string containing the name of a pin
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group.
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- function: A string containing the name of the function to mux to the pin
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group(s) specified by the groups property.
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Valid values for pin, group and function names can be found in the group and
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function arrays of the PFC data file corresponding to the SoC
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(drivers/pinctrl/sh-pfc/pfc-*.c)
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The pin configuration parameters use the generic pinconf bindings defined in
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pinctrl-bindings.txt in this directory. The supported parameters are
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bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For
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pins that have a configurable I/O voltage, the power-source value should be the
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nominal I/O voltage in millivolts.
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GPIO
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----
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On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node.
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Required Properties:
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- gpio-controller: Marks the device node as a gpio controller.
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- #gpio-cells: Should be 2. The first cell is the GPIO number and the second
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cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. Only the
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GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported.
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The syntax of the gpio specifier used by client nodes should be the following
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with values derived from the SoC user manual.
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<[phandle of the gpio controller node]
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[pin number within the gpio controller]
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[flags]>
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On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver.
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Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
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for documentation of the GPIO device tree bindings on those platforms.
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Examples
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--------
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Example 1: SH73A0 (SH-Mobile AG5) pin controller node
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pfc: pfc@e6050000 {
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compatible = "renesas,pfc-sh73a0";
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reg = <0xe6050000 0x8000>,
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<0xe605801c 0x1c>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts-extended =
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<&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>,
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<&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>,
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<&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>,
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<&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>,
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<&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>,
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<&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>,
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<&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>,
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<&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>;
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};
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Example 2: A GPIO LED node that references a GPIO
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#include <dt-bindings/gpio/gpio.h>
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leds {
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compatible = "gpio-leds";
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led1 {
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gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
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};
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};
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Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps
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for the MMCIF and SCIFA4 devices
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&pfc {
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pinctrl-0 = <&scifa4_pins>;
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pinctrl-names = "default";
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mmcif_pins: mmcif {
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mux {
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groups = "mmc0_data8_0", "mmc0_ctrl_0";
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function = "mmc0";
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};
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cfg {
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groups = "mmc0_data8_0";
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pins = "PORT279";
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bias-pull-up;
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};
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};
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scifa4_pins: scifa4 {
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groups = "scifa4_data", "scifa4_ctrl";
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function = "scifa4";
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};
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};
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Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device
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&mmcif {
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pinctrl-0 = <&mmcif_pins>;
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pinctrl-names = "default";
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bus-width = <8>;
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vmmc-supply = <®_1p8v>;
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status = "okay";
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};
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