linux/include/dt-bindings/reset
Linus Torvalds 519f64bf15 This time it looks like a quieter release cycle in the clk tree. I guess that's
because of summer time holidays/vacations. The biggest change in the diffstat
 is in the Qualcomm clk driver, where they got support for CPUs and handful of
 SoCs. After that, the at91 driver got a major rewrite for newer DT bindings
 that should make things easier going forward and the TI code moved to a
 clockdomain based design. The long tail is mostly small driver updates for
 newer clks and some simpler SoC clock drivers such as the Hisilicon and imx
 support.
 
 In the core framework, we only have two small changes this time. One is a new
 clk API to get all clks for a device with the bulk clk APIs. This allows
 drivers that don't care about doing anything besides turning on all the clks to
 just clk_get() them all and turn them on. The other change is the beginning of
 a way to support save and restore of clk settings in the clk framework. TI is
 the only user right now, but we will want to expand upon this design in the
 future to support more save and restore of clk registers.  At least this gets
 us started and works well enough for one SoC, but there's more work in the
 future.
 
 Core:
  - clk_bulk_get_all() API and friends to get all the clks for a device
  - Basic clk state save/restore hooks
 
 New Drivers:
  - Renesas RZ/A2 (R7S9210) SoC, including early clocks
  - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
  - Rensas RZ/G2M (r8a774a1) SoC
  - Qualcomm Krait CPU clk support
  - Qualcomm QCS404 GCC support
  - Qualcomm SDM660 GCC support
  - Qualcomm SDM845 camera clock controller
  - Ingenic jz4725b CGU
  - Hisilicon 3670 SoC support
  - TI SCI clks on K3 SoCs
  - iMX6 MMDC clks
  - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs
 
 Updates:
  - Rework at91 PMC clock driver for new DT bindings
  - Nvidia Tegra clk driver MBIST workaround fix
  - S2RAM support for Marvell mvebu periph clks
  - Use updated printk format for OF node names
  - Fix TI code to only search DT subnodes
  - Various static analysis finds
  - Tag various drivers with SPDX license tags
  - Support dynamic frequency switching (DFS) on qcom SDM845 GCC
  - Only use s2mps11 dt-binding defines instead of redefining them in the driver
  - Add some more missing clks to qcom MSM8996 GCC
  - Quad SPI clks on qcom SDM845
  - Add support for CMT timer clocks on R-Car V3H
  - Add support for SHDI and various timer clocks on R-Car V3M
  - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs
  - Amlogic clk-pll driver improvements and updates
  - Amlogic axg audio controller system clocks
  - Register Amlogic meson8b clock controller early
  - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N
  - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers
  - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC
  - Remove obsoleted Exynos4212 ISP clock definitions
  - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design
  - TI RTC+DDR sleep mode support for clock save/restore
  - Allwinner A64 display engine support and fixes
  - Allwinner A83t display engine support and fixes
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "This time it looks like a quieter release cycle in the clk tree. I
  guess that's because of summer time holidays/vacations. The biggest
  change in the diffstat is in the Qualcomm clk driver, where they got
  support for CPUs and handful of SoCs. After that, the at91 driver got
  a major rewrite for newer DT bindings that should make things easier
  going forward and the TI code moved to a clockdomain based design.

  The long tail is mostly small driver updates for newer clks and some
  simpler SoC clock drivers such as the Hisilicon and imx support.

  In the core framework, we only have two small changes this time.

  One is a new clk API to get all clks for a device with the bulk clk
  APIs. This allows drivers that don't care about doing anything besides
  turning on all the clks to just clk_get() them all and turn them on.

  The other change is the beginning of a way to support save and restore
  of clk settings in the clk framework. TI is the only user right now,
  but we will want to expand upon this design in the future to support
  more save and restore of clk registers. At least this gets us started
  and works well enough for one SoC, but there's more work in the
  future.

  Core:
   - clk_bulk_get_all() API and friends to get all the clks for a device
   - Basic clk state save/restore hooks

  New Drivers:
   - Renesas RZ/A2 (R7S9210) SoC, including early clocks
   - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs
   - Rensas RZ/G2M (r8a774a1) SoC
   - Qualcomm Krait CPU clk support
   - Qualcomm QCS404 GCC support
   - Qualcomm SDM660 GCC support
   - Qualcomm SDM845 camera clock controller
   - Ingenic jz4725b CGU
   - Hisilicon 3670 SoC support
   - TI SCI clks on K3 SoCs
   - iMX6 MMDC clks
   - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs

  Updates:
   - Rework at91 PMC clock driver for new DT bindings
   - Nvidia Tegra clk driver MBIST workaround fix
   - S2RAM support for Marvell mvebu periph clks
   - Use updated printk format for OF node names
   - Fix TI code to only search DT subnodes
   - Various static analysis finds
   - Tag various drivers with SPDX license tags
   - Support dynamic frequency switching (DFS) on qcom SDM845 GCC
   - Only use s2mps11 dt-binding defines instead of redefining them in the driver
   - Add some more missing clks to qcom MSM8996 GCC
   - Quad SPI clks on qcom SDM845
   - Add support for CMT timer clocks on R-Car V3H
   - Add support for SHDI and various timer clocks on R-Car V3M
   - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs
   - Amlogic clk-pll driver improvements and updates
   - Amlogic axg audio controller system clocks
   - Register Amlogic meson8b clock controller early
   - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N
   - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers
   - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC
   - Remove obsoleted Exynos4212 ISP clock definitions
   - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design
   - TI RTC+DDR sleep mode support for clock save/restore
   - Allwinner A64 display engine support and fixes
   - Allwinner A83t display engine support and fixes"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (186 commits)
  clk: qcom: Remove unused arrays in SDM845 GCC
  clk: fixed-rate: fix of_node_get-put imbalance
  clk: s2mps11: Add used attribute to s2mps11_dt_match
  clk: qcom: gcc-sdm660: Add MODULE_LICENSE
  clk: qcom: Add safe switch hook for krait mux clocks
  dt-bindings: clock: Document qcom,krait-cc
  clk: qcom: Add Krait clock controller driver
  dt-bindings: arm: Document qcom,kpss-gcc
  clk: qcom: Add KPSS ACC/GCC driver
  clk: qcom: Add support for Krait clocks
  clk: qcom: Add IPQ806X's HFPLLs
  clk: qcom: Add MSM8960/APQ8064's HFPLLs
  dt-bindings: clock: Document qcom,hfpll
  clk: qcom: Add HFPLL driver
  clk: qcom: Add support for High-Frequency PLLs (HFPLLs)
  ARM: Add Krait L2 register accessor functions
  clk: imx6q: add mmdc0 ipg clock
  clk: imx6sl: add mmdc ipg clocks
  clk: imx6sll: add mmdc1 ipg clock
  clk: imx6sx: add mmdc1 ipg clock
  ...
2018-10-31 11:08:30 -07:00
..
actions,s700-reset.h dt-bindings: reset: Add binding constants for Actions Semi S700 RMU 2018-10-16 14:41:01 -07:00
actions,s900-reset.h dt-bindings: reset: Add binding constants for Actions Semi S900 RMU 2018-10-16 14:41:15 -07:00
altr,rst-mgr-a10.h dt-bindings: Add reset manager offsets for Arria10 2015-08-09 21:58:33 -05:00
altr,rst-mgr-a10sr.h dt-bindings: reset: a10sr: Add Arria10 SR Reset Controller offsets 2017-03-15 12:19:10 +01:00
altr,rst-mgr-s10.h dt-bindings: reset: Add reset manager offsets for Stratix10 2017-06-01 19:16:06 +02:00
altr,rst-mgr.h ARM: socfpga: dts: add reset-controller 2014-05-05 22:33:18 -05:00
amlogic,meson8b-clkc-reset.h dt-bindings: clock: meson8b: describe the embedded reset controller 2017-07-31 10:48:39 +02:00
amlogic,meson8b-reset.h dt-bindings: reset: Add bindings for the Meson SoC Reset Controller 2016-06-01 08:21:12 +02:00
amlogic,meson-axg-audio-arb.h reset: meson: add dt-bindings for meson-axg audio arb 2018-07-20 17:50:24 +02:00
amlogic,meson-axg-reset.h dt-bindings: reset: Add bindings for the Meson-AXG SoC Reset Controller 2017-11-27 09:16:40 +01:00
amlogic,meson-gxbb-reset.h dt-bindings: reset: Add bindings for the Meson SoC Reset Controller 2016-06-01 08:21:12 +02:00
axg-aoclkc.h dt-bindings: clock: reset: Add AXG AO Clock and Reset Bindings 2018-05-15 14:07:11 +02:00
cortina,gemini-reset.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
gxbb-aoclkc.h dt-bindings: clock: reset: Add GXBB AO Clock and Reset Bindings 2016-08-19 12:49:00 -07:00
hisi,hi6220-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
imx7-reset.h reset: imx7: Add PCIE_CTRL_APPS_TURNOFF 2018-10-05 09:56:19 +01:00
mt2701-resets.h dt-bindings: reset: mediatek: add entry for Mali-450 node to refer 2018-05-15 15:21:46 -07:00
mt7622-reset.h reset: mediatek: add reset controller dt-bindings required header for MT7622 SoC 2017-10-04 12:13:29 +02:00
mt8135-resets.h ARM: mediatek: DT: Move reset controller constants into common location 2015-11-24 18:58:12 +01:00
mt8173-resets.h ARM: mediatek: DT: Move reset controller constants into common location 2015-11-24 18:58:12 +01:00
oxsemi,ox810se.h dt-bindings: reset: oxnas: Add include file with reset indexes 2016-10-20 11:55:09 +02:00
oxsemi,ox820.h dt-bindings: reset: oxnas: Add include file with reset indexes 2016-10-20 11:55:09 +02:00
pistachio-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
qcom,gcc-apq8084.h clk: qcom: Add APQ8084 Global Clock Controller support 2014-07-11 13:22:00 -07:00
qcom,gcc-ipq806x.h clk: qcom: Add support for NSS/GMAC clocks and resets 2015-05-30 17:04:36 -07:00
qcom,gcc-mdm9615.h dt-bindings: Add MDM9615 DT bindings include files for GCC and LCC 2016-08-15 15:51:18 -07:00
qcom,gcc-msm8660.h clk: qcom: Add support for MSM8660's global clock controller (GCC) 2014-01-16 12:01:05 -08:00
qcom,gcc-msm8916.h dt-bindings: Add #defines for MSM8916 clocks and resets 2015-03-23 16:09:20 -07:00
qcom,gcc-msm8960.h clk: qcom: Fully support apq8064 global clock control 2014-07-11 13:21:22 -07:00
qcom,gcc-msm8974.h clk: qcom: Add support for MSM8974's global clock controller (GCC) 2014-01-16 12:01:04 -08:00
qcom,mmcc-apq8084.h clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support 2014-07-15 16:38:57 -07:00
qcom,mmcc-msm8960.h clk: qcom: Add support for APQ8064 multimedia clocks 2014-07-15 16:39:03 -07:00
qcom,mmcc-msm8974.h clk: qcom: Add support for MSM8974's multimedia clock controller (MMCC) 2014-01-16 12:01:05 -08:00
qcom,sdm845-aoss.h dt-bindings: reset: Add AOSS reset bindings for SDM845 SoCs 2018-07-16 12:15:38 +02:00
qcom,sdm845-pdc.h dt-bindings: reset: Add PDC Global binding for SDM845 SoCs 2018-10-05 10:33:28 +02:00
snps,hsdk-reset.h ARC: reset: remove the misleading v1 suffix all over 2017-09-18 13:02:03 +02:00
stih407-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
stih415-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
stih416-resets.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
stm32mp1-resets.h dt-bindings: reset: add STM32MP1 resets 2018-03-27 10:44:03 +02:00
sun4i-a10-ccu.h clk: sunxi-ng: Add sun4i/sun7i CCU driver 2017-08-24 10:15:54 +02:00
sun5i-ccu.h clk: sunxi-ng: Add sun5i CCU driver 2017-01-23 11:45:29 +01:00
sun6i-a31-ccu.h clk: sunxi-ng: Add A31/A31s clocks 2016-08-25 22:31:43 +02:00
sun8i-a23-a33-ccu.h clk: sunxi-ng: Add A33 CCU support 2016-09-10 11:41:19 +02:00
sun8i-a83t-ccu.h clk: sunxi-ng: Add driver for A83T CCU 2017-06-07 15:32:16 +02:00
sun8i-de2.h dt-bindings: add binding for the Allwinner DE2 CCU 2017-06-07 15:32:12 +02:00
sun8i-h3-ccu.h clk: sunxi-ng: add Allwinner H5 CCU support for H3 CCU driver 2017-03-06 10:25:56 +01:00
sun8i-r40-ccu.h clk: sunxi-ng: support R40 SoC 2017-08-19 17:04:37 +08:00
sun8i-r-ccu.h clk: sunxi-ng: add support for PRCM CCUs 2017-04-04 17:43:52 +02:00
sun8i-v3s-ccu.h clk: sunxi-ng: add support for V3s CCU 2017-01-20 21:39:03 +01:00
sun9i-a80-ccu.h clk: sunxi-ng: Add A80 CCU 2017-01-30 08:37:30 +01:00
sun9i-a80-de.h clk: sunxi-ng: Add A80 Display Engine CCU 2017-01-30 08:38:30 +01:00
sun9i-a80-usb.h clk: sunxi-ng: Add A80 USB CCU 2017-01-30 08:37:51 +01:00
sun50i-a64-ccu.h clk: sunxi-ng: Add A64 clocks 2016-11-03 09:06:18 +01:00
sun50i-h6-ccu.h clk: sunxi-ng: add support for the Allwinner H6 CCU 2018-03-18 21:17:07 +01:00
sun50i-h6-r-ccu.h clk: sunxi-ng: add support for H6 PRCM CCU 2018-05-04 17:05:46 +02:00
tegra124-car.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
tegra186-reset.h dt-bindings: firmware: Add bindings for Tegra BPMP 2016-11-18 14:33:41 +01:00
tegra194-reset.h arm64: tegra: Add Tegra194 chip device tree 2018-03-08 14:31:13 +01:00
tegra210-car.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
ti-syscon.h Documentation: dt: reset: Add TI syscon reset binding 2016-06-29 23:39:10 +02:00