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1c02cbfec5
Since there are no platform based users and all users of this code are TI OMAP-based which is DT only, it makes sense to remove unused code. Signed-off-by: Nicolae Rosia <Nicolae_Rosia@mentor.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
662 lines
17 KiB
C
662 lines
17 KiB
C
/*
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* rtc-twl.c -- TWL Real Time Clock interface
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*
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* Copyright (C) 2007 MontaVista Software, Inc
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* Author: Alexandre Rusev <source@mvista.com>
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*
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* Based on original TI driver twl4030-rtc.c
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* Copyright (C) 2006 Texas Instruments, Inc.
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*
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* Based on rtc-omap.c
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* Copyright (C) 2003 MontaVista Software, Inc.
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* Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
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* Copyright (C) 2006 David Brownell
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/rtc.h>
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#include <linux/bcd.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/i2c/twl.h>
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enum twl_class {
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TWL_4030 = 0,
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TWL_6030,
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};
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/*
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* RTC block register offsets (use TWL_MODULE_RTC)
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*/
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enum {
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REG_SECONDS_REG = 0,
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REG_MINUTES_REG,
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REG_HOURS_REG,
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REG_DAYS_REG,
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REG_MONTHS_REG,
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REG_YEARS_REG,
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REG_WEEKS_REG,
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REG_ALARM_SECONDS_REG,
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REG_ALARM_MINUTES_REG,
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REG_ALARM_HOURS_REG,
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REG_ALARM_DAYS_REG,
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REG_ALARM_MONTHS_REG,
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REG_ALARM_YEARS_REG,
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REG_RTC_CTRL_REG,
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REG_RTC_STATUS_REG,
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REG_RTC_INTERRUPTS_REG,
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REG_RTC_COMP_LSB_REG,
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REG_RTC_COMP_MSB_REG,
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};
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static const u8 twl4030_rtc_reg_map[] = {
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[REG_SECONDS_REG] = 0x00,
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[REG_MINUTES_REG] = 0x01,
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[REG_HOURS_REG] = 0x02,
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[REG_DAYS_REG] = 0x03,
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[REG_MONTHS_REG] = 0x04,
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[REG_YEARS_REG] = 0x05,
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[REG_WEEKS_REG] = 0x06,
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[REG_ALARM_SECONDS_REG] = 0x07,
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[REG_ALARM_MINUTES_REG] = 0x08,
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[REG_ALARM_HOURS_REG] = 0x09,
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[REG_ALARM_DAYS_REG] = 0x0A,
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[REG_ALARM_MONTHS_REG] = 0x0B,
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[REG_ALARM_YEARS_REG] = 0x0C,
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[REG_RTC_CTRL_REG] = 0x0D,
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[REG_RTC_STATUS_REG] = 0x0E,
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[REG_RTC_INTERRUPTS_REG] = 0x0F,
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[REG_RTC_COMP_LSB_REG] = 0x10,
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[REG_RTC_COMP_MSB_REG] = 0x11,
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};
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static const u8 twl6030_rtc_reg_map[] = {
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[REG_SECONDS_REG] = 0x00,
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[REG_MINUTES_REG] = 0x01,
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[REG_HOURS_REG] = 0x02,
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[REG_DAYS_REG] = 0x03,
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[REG_MONTHS_REG] = 0x04,
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[REG_YEARS_REG] = 0x05,
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[REG_WEEKS_REG] = 0x06,
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[REG_ALARM_SECONDS_REG] = 0x08,
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[REG_ALARM_MINUTES_REG] = 0x09,
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[REG_ALARM_HOURS_REG] = 0x0A,
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[REG_ALARM_DAYS_REG] = 0x0B,
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[REG_ALARM_MONTHS_REG] = 0x0C,
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[REG_ALARM_YEARS_REG] = 0x0D,
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[REG_RTC_CTRL_REG] = 0x10,
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[REG_RTC_STATUS_REG] = 0x11,
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[REG_RTC_INTERRUPTS_REG] = 0x12,
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[REG_RTC_COMP_LSB_REG] = 0x13,
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[REG_RTC_COMP_MSB_REG] = 0x14,
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};
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/* RTC_CTRL_REG bitfields */
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#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
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#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
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#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
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#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
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#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
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#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
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#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
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#define BIT_RTC_CTRL_REG_RTC_V_OPT 0x80
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/* RTC_STATUS_REG bitfields */
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#define BIT_RTC_STATUS_REG_RUN_M 0x02
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#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
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#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
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#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
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#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
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#define BIT_RTC_STATUS_REG_ALARM_M 0x40
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#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
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/* RTC_INTERRUPTS_REG bitfields */
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#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
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#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
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#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
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/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
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#define ALL_TIME_REGS 6
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/*----------------------------------------------------------------------*/
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struct twl_rtc {
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struct device *dev;
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struct rtc_device *rtc;
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u8 *reg_map;
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/*
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* Cache the value for timer/alarm interrupts register; this is
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* only changed by callers holding rtc ops lock (or resume).
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*/
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unsigned char rtc_irq_bits;
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bool wake_enabled;
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#ifdef CONFIG_PM_SLEEP
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unsigned char irqstat;
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#endif
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enum twl_class class;
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};
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/*
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* Supports 1 byte read from TWL RTC register.
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*/
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static int twl_rtc_read_u8(struct twl_rtc *twl_rtc, u8 *data, u8 reg)
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{
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int ret;
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ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (twl_rtc->reg_map[reg]));
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if (ret < 0)
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pr_err("Could not read TWL register %X - error %d\n", reg, ret);
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return ret;
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}
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/*
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* Supports 1 byte write to TWL RTC registers.
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*/
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static int twl_rtc_write_u8(struct twl_rtc *twl_rtc, u8 data, u8 reg)
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{
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int ret;
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ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (twl_rtc->reg_map[reg]));
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if (ret < 0)
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pr_err("Could not write TWL register %X - error %d\n",
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reg, ret);
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return ret;
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}
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/*
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* Enable 1/second update and/or alarm interrupts.
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*/
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static int set_rtc_irq_bit(struct twl_rtc *twl_rtc, unsigned char bit)
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{
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unsigned char val;
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int ret;
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/* if the bit is set, return from here */
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if (twl_rtc->rtc_irq_bits & bit)
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return 0;
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val = twl_rtc->rtc_irq_bits | bit;
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val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
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ret = twl_rtc_write_u8(twl_rtc, val, REG_RTC_INTERRUPTS_REG);
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if (ret == 0)
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twl_rtc->rtc_irq_bits = val;
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return ret;
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}
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/*
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* Disable update and/or alarm interrupts.
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*/
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static int mask_rtc_irq_bit(struct twl_rtc *twl_rtc, unsigned char bit)
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{
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unsigned char val;
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int ret;
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/* if the bit is clear, return from here */
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if (!(twl_rtc->rtc_irq_bits & bit))
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return 0;
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val = twl_rtc->rtc_irq_bits & ~bit;
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ret = twl_rtc_write_u8(twl_rtc, val, REG_RTC_INTERRUPTS_REG);
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if (ret == 0)
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twl_rtc->rtc_irq_bits = val;
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return ret;
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}
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static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct twl_rtc *twl_rtc = dev_get_drvdata(dev);
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int irq = platform_get_irq(pdev, 0);
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int ret;
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if (enabled) {
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ret = set_rtc_irq_bit(twl_rtc,
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BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
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if (device_can_wakeup(dev) && !twl_rtc->wake_enabled) {
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enable_irq_wake(irq);
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twl_rtc->wake_enabled = true;
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}
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} else {
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ret = mask_rtc_irq_bit(twl_rtc,
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BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
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if (twl_rtc->wake_enabled) {
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disable_irq_wake(irq);
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twl_rtc->wake_enabled = false;
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}
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}
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return ret;
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}
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/*
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* Gets current TWL RTC time and date parameters.
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*
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* The RTC's time/alarm representation is not what gmtime(3) requires
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* Linux to use:
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*
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* - Months are 1..12 vs Linux 0-11
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* - Years are 0..99 vs Linux 1900..N (we assume 21st century)
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*/
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static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct twl_rtc *twl_rtc = dev_get_drvdata(dev);
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unsigned char rtc_data[ALL_TIME_REGS];
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int ret;
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u8 save_control;
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u8 rtc_control;
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ret = twl_rtc_read_u8(twl_rtc, &save_control, REG_RTC_CTRL_REG);
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if (ret < 0) {
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dev_err(dev, "%s: reading CTRL_REG, error %d\n", __func__, ret);
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return ret;
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}
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/* for twl6030/32 make sure BIT_RTC_CTRL_REG_GET_TIME_M is clear */
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if (twl_rtc->class == TWL_6030) {
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if (save_control & BIT_RTC_CTRL_REG_GET_TIME_M) {
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save_control &= ~BIT_RTC_CTRL_REG_GET_TIME_M;
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ret = twl_rtc_write_u8(twl_rtc, save_control,
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REG_RTC_CTRL_REG);
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if (ret < 0) {
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dev_err(dev, "%s clr GET_TIME, error %d\n",
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__func__, ret);
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return ret;
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}
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}
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}
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/* Copy RTC counting registers to static registers or latches */
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rtc_control = save_control | BIT_RTC_CTRL_REG_GET_TIME_M;
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/* for twl6030/32 enable read access to static shadowed registers */
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if (twl_rtc->class == TWL_6030)
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rtc_control |= BIT_RTC_CTRL_REG_RTC_V_OPT;
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ret = twl_rtc_write_u8(twl_rtc, rtc_control, REG_RTC_CTRL_REG);
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if (ret < 0) {
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dev_err(dev, "%s: writing CTRL_REG, error %d\n", __func__, ret);
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return ret;
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}
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ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
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(twl_rtc->reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
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if (ret < 0) {
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dev_err(dev, "%s: reading data, error %d\n", __func__, ret);
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return ret;
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}
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/* for twl6030 restore original state of rtc control register */
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if (twl_rtc->class == TWL_6030) {
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ret = twl_rtc_write_u8(twl_rtc, save_control, REG_RTC_CTRL_REG);
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if (ret < 0) {
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dev_err(dev, "%s: restore CTRL_REG, error %d\n",
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__func__, ret);
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return ret;
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}
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}
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tm->tm_sec = bcd2bin(rtc_data[0]);
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tm->tm_min = bcd2bin(rtc_data[1]);
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tm->tm_hour = bcd2bin(rtc_data[2]);
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tm->tm_mday = bcd2bin(rtc_data[3]);
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tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
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tm->tm_year = bcd2bin(rtc_data[5]) + 100;
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return ret;
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}
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static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct twl_rtc *twl_rtc = dev_get_drvdata(dev);
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unsigned char save_control;
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unsigned char rtc_data[ALL_TIME_REGS];
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int ret;
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rtc_data[0] = bin2bcd(tm->tm_sec);
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rtc_data[1] = bin2bcd(tm->tm_min);
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rtc_data[2] = bin2bcd(tm->tm_hour);
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rtc_data[3] = bin2bcd(tm->tm_mday);
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rtc_data[4] = bin2bcd(tm->tm_mon + 1);
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rtc_data[5] = bin2bcd(tm->tm_year - 100);
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/* Stop RTC while updating the TC registers */
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ret = twl_rtc_read_u8(twl_rtc, &save_control, REG_RTC_CTRL_REG);
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if (ret < 0)
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goto out;
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save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
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ret = twl_rtc_write_u8(twl_rtc, save_control, REG_RTC_CTRL_REG);
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if (ret < 0)
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goto out;
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/* update all the time registers in one shot */
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ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data,
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(twl_rtc->reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
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if (ret < 0) {
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dev_err(dev, "rtc_set_time error %d\n", ret);
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goto out;
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}
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/* Start back RTC */
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save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
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ret = twl_rtc_write_u8(twl_rtc, save_control, REG_RTC_CTRL_REG);
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out:
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return ret;
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}
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/*
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* Gets current TWL RTC alarm time.
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*/
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static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct twl_rtc *twl_rtc = dev_get_drvdata(dev);
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unsigned char rtc_data[ALL_TIME_REGS];
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int ret;
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ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
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twl_rtc->reg_map[REG_ALARM_SECONDS_REG], ALL_TIME_REGS);
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if (ret < 0) {
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dev_err(dev, "rtc_read_alarm error %d\n", ret);
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return ret;
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}
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/* some of these fields may be wildcard/"match all" */
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alm->time.tm_sec = bcd2bin(rtc_data[0]);
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alm->time.tm_min = bcd2bin(rtc_data[1]);
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alm->time.tm_hour = bcd2bin(rtc_data[2]);
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alm->time.tm_mday = bcd2bin(rtc_data[3]);
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alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
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alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
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/* report cached alarm enable state */
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if (twl_rtc->rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
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alm->enabled = 1;
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return ret;
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}
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static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct twl_rtc *twl_rtc = dev_get_drvdata(dev);
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unsigned char alarm_data[ALL_TIME_REGS];
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int ret;
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ret = twl_rtc_alarm_irq_enable(dev, 0);
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if (ret)
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goto out;
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alarm_data[0] = bin2bcd(alm->time.tm_sec);
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alarm_data[1] = bin2bcd(alm->time.tm_min);
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alarm_data[2] = bin2bcd(alm->time.tm_hour);
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alarm_data[3] = bin2bcd(alm->time.tm_mday);
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alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
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alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
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/* update all the alarm registers in one shot */
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ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,
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twl_rtc->reg_map[REG_ALARM_SECONDS_REG], ALL_TIME_REGS);
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if (ret) {
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dev_err(dev, "rtc_set_alarm error %d\n", ret);
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goto out;
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}
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if (alm->enabled)
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ret = twl_rtc_alarm_irq_enable(dev, 1);
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out:
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return ret;
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}
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static irqreturn_t twl_rtc_interrupt(int irq, void *data)
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{
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struct twl_rtc *twl_rtc = data;
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unsigned long events;
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int ret = IRQ_NONE;
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int res;
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u8 rd_reg;
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res = twl_rtc_read_u8(twl_rtc, &rd_reg, REG_RTC_STATUS_REG);
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if (res)
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goto out;
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/*
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* Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
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* only one (ALARM or RTC) interrupt source may be enabled
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* at time, we also could check our results
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* by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
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*/
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if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
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events = RTC_IRQF | RTC_AF;
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else
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events = RTC_IRQF | RTC_PF;
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res = twl_rtc_write_u8(twl_rtc, BIT_RTC_STATUS_REG_ALARM_M,
|
|
REG_RTC_STATUS_REG);
|
|
if (res)
|
|
goto out;
|
|
|
|
if (twl_rtc->class == TWL_4030) {
|
|
/* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
|
|
* needs 2 reads to clear the interrupt. One read is done in
|
|
* do_twl_pwrirq(). Doing the second read, to clear
|
|
* the bit.
|
|
*
|
|
* FIXME the reason PWR_ISR1 needs an extra read is that
|
|
* RTC_IF retriggered until we cleared REG_ALARM_M above.
|
|
* But re-reading like this is a bad hack; by doing so we
|
|
* risk wrongly clearing status for some other IRQ (losing
|
|
* the interrupt). Be smarter about handling RTC_UF ...
|
|
*/
|
|
res = twl_i2c_read_u8(TWL4030_MODULE_INT,
|
|
&rd_reg, TWL4030_INT_PWR_ISR1);
|
|
if (res)
|
|
goto out;
|
|
}
|
|
|
|
/* Notify RTC core on event */
|
|
rtc_update_irq(twl_rtc->rtc, 1, events);
|
|
|
|
ret = IRQ_HANDLED;
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static const struct rtc_class_ops twl_rtc_ops = {
|
|
.read_time = twl_rtc_read_time,
|
|
.set_time = twl_rtc_set_time,
|
|
.read_alarm = twl_rtc_read_alarm,
|
|
.set_alarm = twl_rtc_set_alarm,
|
|
.alarm_irq_enable = twl_rtc_alarm_irq_enable,
|
|
};
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
static int twl_rtc_probe(struct platform_device *pdev)
|
|
{
|
|
struct twl_rtc *twl_rtc;
|
|
struct device_node *np = pdev->dev.of_node;
|
|
int ret = -EINVAL;
|
|
int irq = platform_get_irq(pdev, 0);
|
|
u8 rd_reg;
|
|
|
|
if (!np) {
|
|
dev_err(&pdev->dev, "no DT info\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (irq <= 0)
|
|
return ret;
|
|
|
|
twl_rtc = devm_kzalloc(&pdev->dev, sizeof(*twl_rtc), GFP_KERNEL);
|
|
if (!twl_rtc)
|
|
return -ENOMEM;
|
|
|
|
if (twl_class_is_4030()) {
|
|
twl_rtc->class = TWL_4030;
|
|
twl_rtc->reg_map = (u8 *)twl4030_rtc_reg_map;
|
|
} else if (twl_class_is_6030()) {
|
|
twl_rtc->class = TWL_6030;
|
|
twl_rtc->reg_map = (u8 *)twl6030_rtc_reg_map;
|
|
} else {
|
|
dev_err(&pdev->dev, "TWL Class not supported.\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
ret = twl_rtc_read_u8(twl_rtc, &rd_reg, REG_RTC_STATUS_REG);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
|
|
dev_warn(&pdev->dev, "Power up reset detected.\n");
|
|
|
|
if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
|
|
dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
|
|
|
|
/* Clear RTC Power up reset and pending alarm interrupts */
|
|
ret = twl_rtc_write_u8(twl_rtc, rd_reg, REG_RTC_STATUS_REG);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
if (twl_rtc->class == TWL_6030) {
|
|
twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
|
|
REG_INT_MSK_LINE_A);
|
|
twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
|
|
REG_INT_MSK_STS_A);
|
|
}
|
|
|
|
dev_info(&pdev->dev, "Enabling TWL-RTC\n");
|
|
ret = twl_rtc_write_u8(twl_rtc, BIT_RTC_CTRL_REG_STOP_RTC_M,
|
|
REG_RTC_CTRL_REG);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* ensure interrupts are disabled, bootloaders can be strange */
|
|
ret = twl_rtc_write_u8(twl_rtc, 0, REG_RTC_INTERRUPTS_REG);
|
|
if (ret < 0)
|
|
dev_warn(&pdev->dev, "unable to disable interrupt\n");
|
|
|
|
/* init cached IRQ enable bits */
|
|
ret = twl_rtc_read_u8(twl_rtc, &twl_rtc->rtc_irq_bits,
|
|
REG_RTC_INTERRUPTS_REG);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
platform_set_drvdata(pdev, twl_rtc);
|
|
device_init_wakeup(&pdev->dev, 1);
|
|
|
|
twl_rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
|
|
&twl_rtc_ops, THIS_MODULE);
|
|
if (IS_ERR(twl_rtc->rtc)) {
|
|
dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
|
|
PTR_ERR(twl_rtc->rtc));
|
|
return PTR_ERR(twl_rtc->rtc);
|
|
}
|
|
|
|
ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
|
twl_rtc_interrupt,
|
|
IRQF_TRIGGER_RISING | IRQF_ONESHOT,
|
|
dev_name(&twl_rtc->rtc->dev), twl_rtc);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "IRQ is not free.\n");
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Disable all TWL RTC module interrupts.
|
|
* Sets status flag to free.
|
|
*/
|
|
static int twl_rtc_remove(struct platform_device *pdev)
|
|
{
|
|
struct twl_rtc *twl_rtc = platform_get_drvdata(pdev);
|
|
|
|
/* leave rtc running, but disable irqs */
|
|
mask_rtc_irq_bit(twl_rtc, BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
|
|
mask_rtc_irq_bit(twl_rtc, BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
|
|
if (twl_rtc->class == TWL_6030) {
|
|
twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
|
|
REG_INT_MSK_LINE_A);
|
|
twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
|
|
REG_INT_MSK_STS_A);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void twl_rtc_shutdown(struct platform_device *pdev)
|
|
{
|
|
struct twl_rtc *twl_rtc = platform_get_drvdata(pdev);
|
|
|
|
/* mask timer interrupts, but leave alarm interrupts on to enable
|
|
power-on when alarm is triggered */
|
|
mask_rtc_irq_bit(twl_rtc, BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int twl_rtc_suspend(struct device *dev)
|
|
{
|
|
struct twl_rtc *twl_rtc = dev_get_drvdata(dev);
|
|
|
|
twl_rtc->irqstat = twl_rtc->rtc_irq_bits;
|
|
|
|
mask_rtc_irq_bit(twl_rtc, BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
|
|
return 0;
|
|
}
|
|
|
|
static int twl_rtc_resume(struct device *dev)
|
|
{
|
|
struct twl_rtc *twl_rtc = dev_get_drvdata(dev);
|
|
|
|
set_rtc_irq_bit(twl_rtc, twl_rtc->irqstat);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(twl_rtc_pm_ops, twl_rtc_suspend, twl_rtc_resume);
|
|
|
|
static const struct of_device_id twl_rtc_of_match[] = {
|
|
{.compatible = "ti,twl4030-rtc", },
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, twl_rtc_of_match);
|
|
|
|
static struct platform_driver twl4030rtc_driver = {
|
|
.probe = twl_rtc_probe,
|
|
.remove = twl_rtc_remove,
|
|
.shutdown = twl_rtc_shutdown,
|
|
.driver = {
|
|
.name = "twl_rtc",
|
|
.pm = &twl_rtc_pm_ops,
|
|
.of_match_table = twl_rtc_of_match,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(twl4030rtc_driver);
|
|
|
|
MODULE_AUTHOR("Texas Instruments, MontaVista Software");
|
|
MODULE_LICENSE("GPL");
|