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47058bb54b
Stop providing the possibility to override the address space using set_fs() now that there is no need for that any more. To properly handle the TASK_SIZE_MAX checking for 4 vs 5-level page tables on x86 a new alternative is introduced, which just like the one in entry_64.S has to use the hardcoded virtual address bits to escape the fact that TASK_SIZE_MAX isn't actually a constant when 5-level page tables are enabled. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
105 lines
3.1 KiB
C
105 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Generate definitions needed by assembly language modules.
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* This code generates raw asm output which is post-processed to extract
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* and format the required data.
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*/
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#define COMPILE_OFFSETS
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#include <linux/crypto.h>
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#include <linux/sched.h>
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#include <linux/stddef.h>
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#include <linux/hardirq.h>
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#include <linux/suspend.h>
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#include <linux/kbuild.h>
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#include <asm/processor.h>
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#include <asm/thread_info.h>
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#include <asm/sigframe.h>
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#include <asm/bootparam.h>
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#include <asm/suspend.h>
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#include <asm/tlbflush.h>
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#ifdef CONFIG_XEN
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#include <xen/interface/xen.h>
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#endif
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#ifdef CONFIG_X86_32
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# include "asm-offsets_32.c"
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#else
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# include "asm-offsets_64.c"
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#endif
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static void __used common(void)
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{
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BLANK();
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OFFSET(TASK_threadsp, task_struct, thread.sp);
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#ifdef CONFIG_STACKPROTECTOR
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OFFSET(TASK_stack_canary, task_struct, stack_canary);
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#endif
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BLANK();
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OFFSET(crypto_tfm_ctx_offset, crypto_tfm, __crt_ctx);
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BLANK();
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OFFSET(pbe_address, pbe, address);
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OFFSET(pbe_orig_address, pbe, orig_address);
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OFFSET(pbe_next, pbe, next);
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#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
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BLANK();
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OFFSET(IA32_SIGCONTEXT_ax, sigcontext_32, ax);
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OFFSET(IA32_SIGCONTEXT_bx, sigcontext_32, bx);
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OFFSET(IA32_SIGCONTEXT_cx, sigcontext_32, cx);
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OFFSET(IA32_SIGCONTEXT_dx, sigcontext_32, dx);
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OFFSET(IA32_SIGCONTEXT_si, sigcontext_32, si);
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OFFSET(IA32_SIGCONTEXT_di, sigcontext_32, di);
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OFFSET(IA32_SIGCONTEXT_bp, sigcontext_32, bp);
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OFFSET(IA32_SIGCONTEXT_sp, sigcontext_32, sp);
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OFFSET(IA32_SIGCONTEXT_ip, sigcontext_32, ip);
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BLANK();
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OFFSET(IA32_RT_SIGFRAME_sigcontext, rt_sigframe_ia32, uc.uc_mcontext);
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#endif
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#ifdef CONFIG_PARAVIRT_XXL
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BLANK();
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OFFSET(PV_IRQ_irq_disable, paravirt_patch_template, irq.irq_disable);
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OFFSET(PV_IRQ_irq_enable, paravirt_patch_template, irq.irq_enable);
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OFFSET(PV_CPU_iret, paravirt_patch_template, cpu.iret);
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OFFSET(PV_MMU_read_cr2, paravirt_patch_template, mmu.read_cr2);
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#endif
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#ifdef CONFIG_XEN
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BLANK();
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OFFSET(XEN_vcpu_info_mask, vcpu_info, evtchn_upcall_mask);
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OFFSET(XEN_vcpu_info_pending, vcpu_info, evtchn_upcall_pending);
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OFFSET(XEN_vcpu_info_arch_cr2, vcpu_info, arch.cr2);
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#endif
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BLANK();
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OFFSET(BP_scratch, boot_params, scratch);
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OFFSET(BP_secure_boot, boot_params, secure_boot);
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OFFSET(BP_loadflags, boot_params, hdr.loadflags);
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OFFSET(BP_hardware_subarch, boot_params, hdr.hardware_subarch);
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OFFSET(BP_version, boot_params, hdr.version);
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OFFSET(BP_kernel_alignment, boot_params, hdr.kernel_alignment);
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OFFSET(BP_init_size, boot_params, hdr.init_size);
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OFFSET(BP_pref_address, boot_params, hdr.pref_address);
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BLANK();
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DEFINE(PTREGS_SIZE, sizeof(struct pt_regs));
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/* TLB state for the entry code */
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OFFSET(TLB_STATE_user_pcid_flush_mask, tlb_state, user_pcid_flush_mask);
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/* Layout info for cpu_entry_area */
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OFFSET(CPU_ENTRY_AREA_entry_stack, cpu_entry_area, entry_stack_page);
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DEFINE(SIZEOF_entry_stack, sizeof(struct entry_stack));
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DEFINE(MASK_entry_stack, (~(sizeof(struct entry_stack) - 1)));
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/* Offset for fields in tss_struct */
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OFFSET(TSS_sp0, tss_struct, x86_tss.sp0);
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OFFSET(TSS_sp1, tss_struct, x86_tss.sp1);
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OFFSET(TSS_sp2, tss_struct, x86_tss.sp2);
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}
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