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454854ace2
Add FP emulation debugfs statistics for individual instructions. The debugfs files that contain counter values are placed in a separate directory called "instructions". This means that the default path for these new stat is "/sys/kernel/debug/mips/fpuemustats/instructions". Each instruction counter is mapped to the debugfs file that has the same name as instruction name. The lowercase is choosen as more commonly used case for instruction names. One example of usage: mips_host::/sys/kernel/debug/mips/fpuemustats/instructions # grep "" * The shortened output of this command is: abs.d:34 abs.s:5711 add.d:10401 add.s:399307 bc1eqz:3199 ... ... ... sub.s:167211 trunc.l.d:375 trunc.l.s:8054 trunc.w.d:421 trunc.w.s:27032 The limitation of this patch is that it handles R6 FP emulation instructions only. There are altogether 114 handled instructions. Signed-off-by: Miodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: Goran Ferenc <goran.ferenc@imgtec.com> Signed-off-by: Aleksandar Markovic <aleksandar.markovic@imgtec.com> Cc: Douglas Leung <douglas.leung@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Maciej W. Rozycki <macro@imgtec.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Petar Jovanovic <petar.jovanovic@imgtec.com> Cc: Raghu Gandham <raghu.gandham@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17145/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
214 lines
5.7 KiB
C
214 lines
5.7 KiB
C
/*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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* Further private data for which no space exists in mips_fpu_struct.
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* This should be subsumed into the mips_fpu_struct structure as
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* defined in processor.h as soon as the absurd wired absolute assembler
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* offsets become dynamic at compile time.
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*
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* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
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*/
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#ifndef _ASM_FPU_EMULATOR_H
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#define _ASM_FPU_EMULATOR_H
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#include <linux/sched.h>
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#include <asm/dsemul.h>
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#include <asm/thread_info.h>
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#include <asm/inst.h>
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#include <asm/local.h>
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#include <asm/processor.h>
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#ifdef CONFIG_DEBUG_FS
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struct mips_fpu_emulator_stats {
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unsigned long emulated;
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unsigned long loads;
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unsigned long stores;
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unsigned long branches;
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unsigned long cp1ops;
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unsigned long cp1xops;
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unsigned long errors;
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unsigned long ieee754_inexact;
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unsigned long ieee754_underflow;
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unsigned long ieee754_overflow;
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unsigned long ieee754_zerodiv;
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unsigned long ieee754_invalidop;
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unsigned long ds_emul;
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unsigned long abs_s;
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unsigned long abs_d;
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unsigned long add_s;
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unsigned long add_d;
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unsigned long bc1eqz;
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unsigned long bc1nez;
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unsigned long ceil_w_s;
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unsigned long ceil_w_d;
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unsigned long ceil_l_s;
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unsigned long ceil_l_d;
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unsigned long class_s;
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unsigned long class_d;
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unsigned long cmp_af_s;
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unsigned long cmp_af_d;
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unsigned long cmp_eq_s;
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unsigned long cmp_eq_d;
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unsigned long cmp_le_s;
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unsigned long cmp_le_d;
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unsigned long cmp_lt_s;
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unsigned long cmp_lt_d;
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unsigned long cmp_ne_s;
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unsigned long cmp_ne_d;
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unsigned long cmp_or_s;
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unsigned long cmp_or_d;
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unsigned long cmp_ueq_s;
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unsigned long cmp_ueq_d;
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unsigned long cmp_ule_s;
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unsigned long cmp_ule_d;
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unsigned long cmp_ult_s;
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unsigned long cmp_ult_d;
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unsigned long cmp_un_s;
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unsigned long cmp_un_d;
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unsigned long cmp_une_s;
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unsigned long cmp_une_d;
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unsigned long cmp_saf_s;
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unsigned long cmp_saf_d;
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unsigned long cmp_seq_s;
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unsigned long cmp_seq_d;
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unsigned long cmp_sle_s;
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unsigned long cmp_sle_d;
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unsigned long cmp_slt_s;
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unsigned long cmp_slt_d;
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unsigned long cmp_sne_s;
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unsigned long cmp_sne_d;
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unsigned long cmp_sor_s;
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unsigned long cmp_sor_d;
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unsigned long cmp_sueq_s;
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unsigned long cmp_sueq_d;
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unsigned long cmp_sule_s;
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unsigned long cmp_sule_d;
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unsigned long cmp_sult_s;
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unsigned long cmp_sult_d;
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unsigned long cmp_sun_s;
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unsigned long cmp_sun_d;
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unsigned long cmp_sune_s;
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unsigned long cmp_sune_d;
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unsigned long cvt_d_l;
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unsigned long cvt_d_s;
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unsigned long cvt_d_w;
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unsigned long cvt_l_s;
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unsigned long cvt_l_d;
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unsigned long cvt_s_d;
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unsigned long cvt_s_l;
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unsigned long cvt_s_w;
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unsigned long cvt_w_s;
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unsigned long cvt_w_d;
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unsigned long div_s;
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unsigned long div_d;
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unsigned long floor_w_s;
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unsigned long floor_w_d;
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unsigned long floor_l_s;
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unsigned long floor_l_d;
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unsigned long maddf_s;
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unsigned long maddf_d;
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unsigned long max_s;
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unsigned long max_d;
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unsigned long maxa_s;
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unsigned long maxa_d;
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unsigned long min_s;
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unsigned long min_d;
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unsigned long mina_s;
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unsigned long mina_d;
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unsigned long mov_s;
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unsigned long mov_d;
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unsigned long msubf_s;
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unsigned long msubf_d;
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unsigned long mul_s;
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unsigned long mul_d;
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unsigned long neg_s;
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unsigned long neg_d;
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unsigned long recip_s;
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unsigned long recip_d;
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unsigned long rint_s;
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unsigned long rint_d;
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unsigned long round_w_s;
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unsigned long round_w_d;
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unsigned long round_l_s;
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unsigned long round_l_d;
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unsigned long rsqrt_s;
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unsigned long rsqrt_d;
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unsigned long sel_s;
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unsigned long sel_d;
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unsigned long seleqz_s;
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unsigned long seleqz_d;
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unsigned long selnez_s;
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unsigned long selnez_d;
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unsigned long sqrt_s;
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unsigned long sqrt_d;
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unsigned long sub_s;
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unsigned long sub_d;
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unsigned long trunc_w_s;
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unsigned long trunc_w_d;
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unsigned long trunc_l_s;
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unsigned long trunc_l_d;
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};
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DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
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#define MIPS_FPU_EMU_INC_STATS(M) \
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do { \
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preempt_disable(); \
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__this_cpu_inc(fpuemustats.M); \
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preempt_enable(); \
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} while (0)
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#else
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#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
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#endif /* CONFIG_DEBUG_FS */
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extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
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struct mips_fpu_struct *ctx, int has_fpu,
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void __user **fault_addr);
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void force_fcr31_sig(unsigned long fcr31, void __user *fault_addr,
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struct task_struct *tsk);
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int process_fpemu_return(int sig, void __user *fault_addr,
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unsigned long fcr31);
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int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
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unsigned long *contpc);
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int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
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unsigned long *contpc);
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#define SIGNALLING_NAN 0x7ff800007ff80000LL
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static inline void fpu_emulator_init_fpu(void)
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{
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struct task_struct *t = current;
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int i;
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for (i = 0; i < 32; i++)
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set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN);
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}
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/*
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* Mask the FCSR Cause bits according to the Enable bits, observing
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* that Unimplemented is always enabled.
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*/
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static inline unsigned long mask_fcr31_x(unsigned long fcr31)
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{
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return fcr31 & (FPU_CSR_UNI_X |
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((fcr31 & FPU_CSR_ALL_E) <<
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(ffs(FPU_CSR_ALL_X) - ffs(FPU_CSR_ALL_E))));
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}
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#endif /* _ASM_FPU_EMULATOR_H */
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