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Bit 3 of the SR register is set if there is a tx underrun. If this bit isn't set, we should loop on the tx ready bit until we can transmit again. Otherwise we should skip the loop and transmit immediately. The code is doing the opposite though, checking for an underrun and then looping on the tx ready bit causing us to never loop on the tx read bit when the tx buffer may not be ready. This doesn't seem to affect my 8960 device too often, but in some cases I see a lost character or two from the decompressor prints. This also matches what we do in the assembly in debug-macro.S. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ASM_ARCH_MSM_UNCOMPRESS_H
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#define __ASM_ARCH_MSM_UNCOMPRESS_H
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#include <asm/barrier.h>
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#include <asm/processor.h>
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#include <mach/msm_iomap.h>
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#define UART_CSR (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08))
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#define UART_TF (*(volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x0c))
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#define UART_DM_SR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x08)))
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#define UART_DM_CR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x10)))
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#define UART_DM_ISR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x14)))
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#define UART_DM_NCHAR (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x40)))
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#define UART_DM_TF (*((volatile uint32_t *)(MSM_DEBUG_UART_PHYS + 0x70)))
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static void putc(int c)
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{
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#if defined(MSM_DEBUG_UART_PHYS)
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#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
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/*
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* Wait for TX_READY to be set; but skip it if we have a
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* TX underrun.
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*/
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if (!(UART_DM_SR & 0x08))
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while (!(UART_DM_ISR & 0x80))
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cpu_relax();
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UART_DM_CR = 0x300;
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UART_DM_NCHAR = 0x1;
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UART_DM_TF = c;
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#else
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while (!(UART_CSR & 0x04))
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cpu_relax();
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UART_TF = c;
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#endif
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#endif
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}
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static inline void flush(void)
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{
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}
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static inline void arch_decomp_setup(void)
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{
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}
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#endif
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