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1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
165 lines
4.6 KiB
C
165 lines
4.6 KiB
C
/*
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* arch/ppc/kernel/irq.c
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*
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* Derived from arch/i386/kernel/irq.c
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* Copyright (C) 1992 Linus Torvalds
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* Adapted from arch/i386 by Gary Thomas
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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* Updated and modified by Cort Dougan <cort@fsmlabs.com>
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* Copyright (C) 1996-2001 Cort Dougan
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* Adapted for Power Macintosh by Paul Mackerras
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* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
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* Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
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*
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* This file contains the code used by various IRQ handling routines:
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* asking for different IRQ's should be done through these routines
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* instead of just grabbing them. Thus setups with different IRQ numbers
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* shouldn't result in any weird surprises, and installing new handlers
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* should be easier.
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*
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* The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
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* interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
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* mask register (of which only 16 are defined), hence the weird shifting
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* and complement of the cached_irq_mask. I want to be able to stuff
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* this right into the SIU SMASK register.
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* Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
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* to reduce code space and undefined function references.
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*/
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/threads.h>
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#include <linux/kernel_stat.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/ptrace.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/timex.h>
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#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/proc_fs.h>
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#include <linux/random.h>
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#include <linux/seq_file.h>
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#include <linux/cpumask.h>
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#include <linux/profile.h>
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#include <linux/bitops.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/irq.h>
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#include <asm/cache.h>
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#include <asm/prom.h>
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#include <asm/ptrace.h>
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#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
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extern atomic_t ipi_recv;
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extern atomic_t ipi_sent;
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#define MAXCOUNT 10000000
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int ppc_spurious_interrupts = 0;
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struct irqaction *ppc_irq_action[NR_IRQS];
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unsigned long ppc_cached_irq_mask[NR_MASK_WORDS];
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unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
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atomic_t ppc_n_lost_interrupts;
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#ifdef CONFIG_TAU_INT
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extern int tau_initialized;
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extern int tau_interrupts(int);
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#endif
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *) v, j;
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struct irqaction * action;
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unsigned long flags;
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if (i == 0) {
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seq_puts(p, " ");
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for (j=0; j<NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "CPU%d ", j);
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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spin_lock_irqsave(&irq_desc[i].lock, flags);
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action = irq_desc[i].action;
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if ( !action || !action->handler )
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goto skip;
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seq_printf(p, "%3d: ", i);
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#ifdef CONFIG_SMP
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for (j = 0; j < NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "%10u ",
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kstat_cpu(j).irqs[i]);
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#else
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seq_printf(p, "%10u ", kstat_irqs(i));
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#endif /* CONFIG_SMP */
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if (irq_desc[i].handler)
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seq_printf(p, " %s ", irq_desc[i].handler->typename);
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else
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seq_puts(p, " None ");
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seq_printf(p, "%s", (irq_desc[i].status & IRQ_LEVEL) ? "Level " : "Edge ");
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seq_printf(p, " %s", action->name);
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for (action = action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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skip:
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spin_unlock_irqrestore(&irq_desc[i].lock, flags);
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} else if (i == NR_IRQS) {
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#ifdef CONFIG_TAU_INT
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if (tau_initialized){
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seq_puts(p, "TAU: ");
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for (j = 0; j < NR_CPUS; j++)
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if (cpu_online(j))
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seq_printf(p, "%10u ", tau_interrupts(j));
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seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
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}
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#endif
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#ifdef CONFIG_SMP
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/* should this be per processor send/receive? */
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seq_printf(p, "IPI (recv/sent): %10u/%u\n",
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atomic_read(&ipi_recv), atomic_read(&ipi_sent));
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#endif
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seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
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}
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return 0;
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}
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void do_IRQ(struct pt_regs *regs)
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{
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int irq, first = 1;
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irq_enter();
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/*
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* Every platform is required to implement ppc_md.get_irq.
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* This function will either return an irq number or -1 to
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* indicate there are no more pending. But the first time
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* through the loop this means there wasn't and IRQ pending.
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* The value -2 is for buggy hardware and means that this IRQ
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* has already been handled. -- Tom
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*/
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while ((irq = ppc_md.get_irq(regs)) >= 0) {
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__do_IRQ(irq, regs);
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first = 0;
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}
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if (irq != -2 && first)
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/* That's not SMP safe ... but who cares ? */
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ppc_spurious_interrupts++;
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irq_exit();
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}
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void __init init_IRQ(void)
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{
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ppc_md.init_IRQ();
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}
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