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The Mediatek cpumux clock implements a mux with a set_parent hook, but doesn't provide a determine_rate implementation. This is a bit odd, since set_parent() is there to, as its name implies, change the parent of a clock. However, the most likely candidates to trigger that parent change are either the assigned-clock-parents device tree property or a call to clk_set_rate(), with determine_rate() figuring out which parent is the best suited for a given rate. The other trigger would be a call to clk_set_parent(), but it's far less used, and it doesn't look like there's any obvious user for that clock. Similarly, it doesn't look like the device tree using that clock driver uses any of the assigned-clock properties on that clock. So, the set_parent hook is effectively unused, possibly because of an oversight. However, it could also be an explicit decision by the original author to avoid any reparenting but through an explicit call to clk_set_parent(). The latter case would be equivalent to setting the determine_rate implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no determine_rate implementation is provided, clk_round_rate() (through clk_core_round_rate_nolock()) will call itself on the parent if CLK_SET_RATE_PARENT is set, and will not change the clock rate otherwise. And if it was an oversight, then we are at least explicit about our behavior now and it can be further refined down the line. Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mediatek@lists.infradead.org Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20221018-clk-range-checks-fixes-v4-29-971d5077e7d2@cerno.tech Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
174 lines
3.7 KiB
C
174 lines
3.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015 Linaro Ltd.
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* Author: Pi-Cheng Chen <pi-cheng.chen@linaro.org>
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*/
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#include <linux/clk-provider.h>
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#include <linux/container_of.h>
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#include <linux/err.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include "clk-mtk.h"
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#include "clk-cpumux.h"
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struct mtk_clk_cpumux {
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struct clk_hw hw;
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struct regmap *regmap;
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u32 reg;
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u32 mask;
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u8 shift;
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};
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static inline struct mtk_clk_cpumux *to_mtk_clk_cpumux(struct clk_hw *_hw)
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{
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return container_of(_hw, struct mtk_clk_cpumux, hw);
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}
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static u8 clk_cpumux_get_parent(struct clk_hw *hw)
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{
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struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw);
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unsigned int val;
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regmap_read(mux->regmap, mux->reg, &val);
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val >>= mux->shift;
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val &= mux->mask;
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return val;
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}
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static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index)
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{
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struct mtk_clk_cpumux *mux = to_mtk_clk_cpumux(hw);
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u32 mask, val;
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val = index << mux->shift;
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mask = mux->mask << mux->shift;
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return regmap_update_bits(mux->regmap, mux->reg, mask, val);
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}
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static const struct clk_ops clk_cpumux_ops = {
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.determine_rate = clk_hw_determine_rate_no_reparent,
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.get_parent = clk_cpumux_get_parent,
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.set_parent = clk_cpumux_set_parent,
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};
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static struct clk_hw *
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mtk_clk_register_cpumux(struct device *dev, const struct mtk_composite *mux,
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struct regmap *regmap)
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{
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struct mtk_clk_cpumux *cpumux;
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int ret;
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struct clk_init_data init;
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cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL);
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if (!cpumux)
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return ERR_PTR(-ENOMEM);
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init.name = mux->name;
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init.ops = &clk_cpumux_ops;
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init.parent_names = mux->parent_names;
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init.num_parents = mux->num_parents;
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init.flags = mux->flags;
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cpumux->reg = mux->mux_reg;
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cpumux->shift = mux->mux_shift;
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cpumux->mask = BIT(mux->mux_width) - 1;
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cpumux->regmap = regmap;
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cpumux->hw.init = &init;
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ret = clk_hw_register(dev, &cpumux->hw);
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if (ret) {
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kfree(cpumux);
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return ERR_PTR(ret);
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}
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return &cpumux->hw;
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}
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static void mtk_clk_unregister_cpumux(struct clk_hw *hw)
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{
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struct mtk_clk_cpumux *cpumux;
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if (!hw)
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return;
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cpumux = to_mtk_clk_cpumux(hw);
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clk_hw_unregister(hw);
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kfree(cpumux);
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}
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int mtk_clk_register_cpumuxes(struct device *dev, struct device_node *node,
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const struct mtk_composite *clks, int num,
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struct clk_hw_onecell_data *clk_data)
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{
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int i;
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struct clk_hw *hw;
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struct regmap *regmap;
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regmap = device_node_to_regmap(node);
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if (IS_ERR(regmap)) {
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pr_err("Cannot find regmap for %pOF: %pe\n", node, regmap);
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return PTR_ERR(regmap);
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}
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for (i = 0; i < num; i++) {
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const struct mtk_composite *mux = &clks[i];
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if (!IS_ERR_OR_NULL(clk_data->hws[mux->id])) {
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pr_warn("%pOF: Trying to register duplicate clock ID: %d\n",
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node, mux->id);
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continue;
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}
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hw = mtk_clk_register_cpumux(dev, mux, regmap);
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if (IS_ERR(hw)) {
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pr_err("Failed to register clk %s: %pe\n", mux->name,
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hw);
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goto err;
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}
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clk_data->hws[mux->id] = hw;
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}
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return 0;
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err:
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while (--i >= 0) {
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const struct mtk_composite *mux = &clks[i];
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if (IS_ERR_OR_NULL(clk_data->hws[mux->id]))
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continue;
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mtk_clk_unregister_cpumux(clk_data->hws[mux->id]);
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clk_data->hws[mux->id] = ERR_PTR(-ENOENT);
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}
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return PTR_ERR(hw);
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}
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EXPORT_SYMBOL_GPL(mtk_clk_register_cpumuxes);
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void mtk_clk_unregister_cpumuxes(const struct mtk_composite *clks, int num,
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struct clk_hw_onecell_data *clk_data)
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{
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int i;
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for (i = num; i > 0; i--) {
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const struct mtk_composite *mux = &clks[i - 1];
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if (IS_ERR_OR_NULL(clk_data->hws[mux->id]))
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continue;
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mtk_clk_unregister_cpumux(clk_data->hws[mux->id]);
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clk_data->hws[mux->id] = ERR_PTR(-ENOENT);
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}
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}
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EXPORT_SYMBOL_GPL(mtk_clk_unregister_cpumuxes);
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MODULE_LICENSE("GPL");
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