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57c7ea513f
ptrace_{get,set}_watch_regs access current_cpu_data to get the watch register count/masks, which calls smp_processor_id(). However they are run in preemptible context and therefore trigger warnings like so: [ 6340.092000] BUG: using smp_processor_id() in preemptible [00000000] code: gdb/367 [ 6340.092000] caller is ptrace_get_watch_regs+0x44/0x220 Since the watch register count/masks should be the same across all CPUs, use boot_cpu_data instead. Note that this may need to change in future should a heterogenous system be supported where the count/masks are not the same across all CPUs (the current code is also incorrect for this scenario - current_cpu_data here would not necessarily be correct for the CPU that the target task will execute on). Signed-off-by: Alex Smith <alex.smith@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6879/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
682 lines
15 KiB
C
682 lines
15 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 Ross Biro
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* Copyright (C) Linus Torvalds
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* Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
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* Copyright (C) 1996 David S. Miller
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* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 1999 MIPS Technologies, Inc.
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* Copyright (C) 2000 Ulf Carlsson
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*
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* At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
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* binaries.
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*/
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#include <linux/compiler.h>
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#include <linux/context_tracking.h>
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#include <linux/elf.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/errno.h>
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#include <linux/ptrace.h>
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#include <linux/regset.h>
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#include <linux/smp.h>
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#include <linux/user.h>
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#include <linux/security.h>
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#include <linux/tracehook.h>
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#include <linux/audit.h>
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#include <linux/seccomp.h>
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#include <linux/ftrace.h>
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#include <asm/byteorder.h>
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#include <asm/cpu.h>
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#include <asm/dsp.h>
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#include <asm/fpu.h>
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#include <asm/mipsregs.h>
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#include <asm/mipsmtregs.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/syscall.h>
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#include <asm/uaccess.h>
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#include <asm/bootinfo.h>
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#include <asm/reg.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/syscalls.h>
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/*
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* Called by kernel/ptrace.c when detaching..
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*
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* Make sure single step bits etc are not set.
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*/
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void ptrace_disable(struct task_struct *child)
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{
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/* Don't load the watchpoint registers for the ex-child. */
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clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
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}
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/*
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* Read a general register set. We always use the 64-bit format, even
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* for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
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* Registers are sign extended to fill the available space.
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*/
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int ptrace_getregs(struct task_struct *child, __s64 __user *data)
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{
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struct pt_regs *regs;
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int i;
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if (!access_ok(VERIFY_WRITE, data, 38 * 8))
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return -EIO;
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regs = task_pt_regs(child);
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for (i = 0; i < 32; i++)
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__put_user((long)regs->regs[i], data + i);
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__put_user((long)regs->lo, data + EF_LO - EF_R0);
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__put_user((long)regs->hi, data + EF_HI - EF_R0);
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__put_user((long)regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
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__put_user((long)regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
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__put_user((long)regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
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__put_user((long)regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
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return 0;
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}
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/*
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* Write a general register set. As for PTRACE_GETREGS, we always use
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* the 64-bit format. On a 32-bit kernel only the lower order half
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* (according to endianness) will be used.
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*/
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int ptrace_setregs(struct task_struct *child, __s64 __user *data)
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{
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struct pt_regs *regs;
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int i;
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if (!access_ok(VERIFY_READ, data, 38 * 8))
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return -EIO;
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regs = task_pt_regs(child);
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for (i = 0; i < 32; i++)
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__get_user(regs->regs[i], data + i);
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__get_user(regs->lo, data + EF_LO - EF_R0);
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__get_user(regs->hi, data + EF_HI - EF_R0);
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__get_user(regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
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/* badvaddr, status, and cause may not be written. */
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return 0;
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}
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int ptrace_getfpregs(struct task_struct *child, __u32 __user *data)
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{
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int i;
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if (!access_ok(VERIFY_WRITE, data, 33 * 8))
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return -EIO;
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if (tsk_used_math(child)) {
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union fpureg *fregs = get_fpu_regs(child);
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for (i = 0; i < 32; i++)
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__put_user(get_fpr64(&fregs[i], 0),
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i + (__u64 __user *)data);
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} else {
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for (i = 0; i < 32; i++)
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__put_user((__u64) -1, i + (__u64 __user *) data);
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}
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__put_user(child->thread.fpu.fcr31, data + 64);
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__put_user(current_cpu_data.fpu_id, data + 65);
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return 0;
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}
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int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
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{
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union fpureg *fregs;
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u64 fpr_val;
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int i;
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if (!access_ok(VERIFY_READ, data, 33 * 8))
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return -EIO;
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fregs = get_fpu_regs(child);
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for (i = 0; i < 32; i++) {
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__get_user(fpr_val, i + (__u64 __user *)data);
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set_fpr64(&fregs[i], 0, fpr_val);
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}
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__get_user(child->thread.fpu.fcr31, data + 64);
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/* FIR may not be written. */
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return 0;
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}
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int ptrace_get_watch_regs(struct task_struct *child,
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struct pt_watch_regs __user *addr)
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{
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enum pt_watch_style style;
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int i;
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if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
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return -EIO;
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if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs)))
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return -EIO;
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#ifdef CONFIG_32BIT
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style = pt_watch_style_mips32;
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#define WATCH_STYLE mips32
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#else
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style = pt_watch_style_mips64;
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#define WATCH_STYLE mips64
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#endif
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__put_user(style, &addr->style);
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__put_user(boot_cpu_data.watch_reg_use_cnt,
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&addr->WATCH_STYLE.num_valid);
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for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
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__put_user(child->thread.watch.mips3264.watchlo[i],
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&addr->WATCH_STYLE.watchlo[i]);
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__put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
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&addr->WATCH_STYLE.watchhi[i]);
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__put_user(boot_cpu_data.watch_reg_masks[i],
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&addr->WATCH_STYLE.watch_masks[i]);
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}
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for (; i < 8; i++) {
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__put_user(0, &addr->WATCH_STYLE.watchlo[i]);
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__put_user(0, &addr->WATCH_STYLE.watchhi[i]);
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__put_user(0, &addr->WATCH_STYLE.watch_masks[i]);
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}
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return 0;
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}
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int ptrace_set_watch_regs(struct task_struct *child,
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struct pt_watch_regs __user *addr)
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{
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int i;
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int watch_active = 0;
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unsigned long lt[NUM_WATCH_REGS];
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u16 ht[NUM_WATCH_REGS];
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if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0)
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return -EIO;
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if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs)))
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return -EIO;
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/* Check the values. */
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for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
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__get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]);
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#ifdef CONFIG_32BIT
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if (lt[i] & __UA_LIMIT)
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return -EINVAL;
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#else
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if (test_tsk_thread_flag(child, TIF_32BIT_ADDR)) {
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if (lt[i] & 0xffffffff80000000UL)
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return -EINVAL;
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} else {
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if (lt[i] & __UA_LIMIT)
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return -EINVAL;
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}
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#endif
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__get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
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if (ht[i] & ~0xff8)
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return -EINVAL;
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}
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/* Install them. */
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for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) {
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if (lt[i] & 7)
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watch_active = 1;
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child->thread.watch.mips3264.watchlo[i] = lt[i];
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/* Set the G bit. */
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child->thread.watch.mips3264.watchhi[i] = ht[i];
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}
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if (watch_active)
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set_tsk_thread_flag(child, TIF_LOAD_WATCH);
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else
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clear_tsk_thread_flag(child, TIF_LOAD_WATCH);
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return 0;
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}
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/* regset get/set implementations */
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static int gpr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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struct pt_regs *regs = task_pt_regs(target);
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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regs, 0, sizeof(*regs));
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}
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static int gpr_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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struct pt_regs newregs;
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int ret;
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ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&newregs,
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0, sizeof(newregs));
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if (ret)
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return ret;
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*task_pt_regs(target) = newregs;
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return 0;
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}
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static int fpr_get(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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void *kbuf, void __user *ubuf)
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{
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unsigned i;
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int err;
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u64 fpr_val;
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/* XXX fcr31 */
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if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
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return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&target->thread.fpu,
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0, sizeof(elf_fpregset_t));
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for (i = 0; i < NUM_FPU_REGS; i++) {
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fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0);
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err = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
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&fpr_val, i * sizeof(elf_fpreg_t),
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(i + 1) * sizeof(elf_fpreg_t));
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if (err)
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return err;
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}
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return 0;
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}
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static int fpr_set(struct task_struct *target,
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const struct user_regset *regset,
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unsigned int pos, unsigned int count,
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const void *kbuf, const void __user *ubuf)
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{
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unsigned i;
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int err;
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u64 fpr_val;
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/* XXX fcr31 */
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if (sizeof(target->thread.fpu.fpr[i]) == sizeof(elf_fpreg_t))
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return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&target->thread.fpu,
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0, sizeof(elf_fpregset_t));
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for (i = 0; i < NUM_FPU_REGS; i++) {
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err = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
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&fpr_val, i * sizeof(elf_fpreg_t),
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(i + 1) * sizeof(elf_fpreg_t));
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if (err)
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return err;
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set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val);
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}
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return 0;
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}
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enum mips_regset {
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REGSET_GPR,
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REGSET_FPR,
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};
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static const struct user_regset mips_regsets[] = {
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[REGSET_GPR] = {
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.core_note_type = NT_PRSTATUS,
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.n = ELF_NGREG,
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.size = sizeof(unsigned int),
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.align = sizeof(unsigned int),
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.get = gpr_get,
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.set = gpr_set,
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},
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[REGSET_FPR] = {
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.core_note_type = NT_PRFPREG,
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.n = ELF_NFPREG,
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.size = sizeof(elf_fpreg_t),
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.align = sizeof(elf_fpreg_t),
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.get = fpr_get,
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.set = fpr_set,
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},
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};
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static const struct user_regset_view user_mips_view = {
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.name = "mips",
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.e_machine = ELF_ARCH,
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.ei_osabi = ELF_OSABI,
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.regsets = mips_regsets,
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.n = ARRAY_SIZE(mips_regsets),
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};
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static const struct user_regset mips64_regsets[] = {
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[REGSET_GPR] = {
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.core_note_type = NT_PRSTATUS,
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.n = ELF_NGREG,
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.size = sizeof(unsigned long),
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.align = sizeof(unsigned long),
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.get = gpr_get,
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.set = gpr_set,
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},
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[REGSET_FPR] = {
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.core_note_type = NT_PRFPREG,
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.n = ELF_NFPREG,
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.size = sizeof(elf_fpreg_t),
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.align = sizeof(elf_fpreg_t),
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.get = fpr_get,
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.set = fpr_set,
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},
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};
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static const struct user_regset_view user_mips64_view = {
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.name = "mips",
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.e_machine = ELF_ARCH,
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.ei_osabi = ELF_OSABI,
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.regsets = mips64_regsets,
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.n = ARRAY_SIZE(mips_regsets),
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};
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const struct user_regset_view *task_user_regset_view(struct task_struct *task)
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{
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#ifdef CONFIG_32BIT
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return &user_mips_view;
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#endif
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#ifdef CONFIG_MIPS32_O32
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if (test_thread_flag(TIF_32BIT_REGS))
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return &user_mips_view;
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#endif
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return &user_mips64_view;
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}
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long arch_ptrace(struct task_struct *child, long request,
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unsigned long addr, unsigned long data)
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{
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int ret;
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void __user *addrp = (void __user *) addr;
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void __user *datavp = (void __user *) data;
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unsigned long __user *datalp = (void __user *) data;
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switch (request) {
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/* when I and D space are separate, these will need to be fixed. */
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case PTRACE_PEEKTEXT: /* read word at location addr. */
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case PTRACE_PEEKDATA:
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ret = generic_ptrace_peekdata(child, addr, data);
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break;
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/* Read the word at location addr in the USER area. */
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case PTRACE_PEEKUSR: {
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struct pt_regs *regs;
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union fpureg *fregs;
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unsigned long tmp = 0;
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regs = task_pt_regs(child);
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ret = 0; /* Default return value. */
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switch (addr) {
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case 0 ... 31:
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tmp = regs->regs[addr];
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break;
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case FPR_BASE ... FPR_BASE + 31:
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if (!tsk_used_math(child)) {
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/* FP not yet used */
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tmp = -1;
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break;
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}
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fregs = get_fpu_regs(child);
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#ifdef CONFIG_32BIT
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if (test_thread_flag(TIF_32BIT_FPREGS)) {
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/*
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* The odd registers are actually the high
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* order bits of the values stored in the even
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* registers - unless we're using r2k_switch.S.
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*/
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tmp = get_fpr32(&fregs[(addr & ~1) - FPR_BASE],
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addr & 1);
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break;
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}
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#endif
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tmp = get_fpr32(&fregs[addr - FPR_BASE], 0);
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break;
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case PC:
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tmp = regs->cp0_epc;
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break;
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case CAUSE:
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tmp = regs->cp0_cause;
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break;
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case BADVADDR:
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tmp = regs->cp0_badvaddr;
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break;
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case MMHI:
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tmp = regs->hi;
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break;
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case MMLO:
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tmp = regs->lo;
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break;
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#ifdef CONFIG_CPU_HAS_SMARTMIPS
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case ACX:
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tmp = regs->acx;
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break;
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#endif
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case FPC_CSR:
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tmp = child->thread.fpu.fcr31;
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break;
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case FPC_EIR:
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/* implementation / version register */
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tmp = current_cpu_data.fpu_id;
|
|
break;
|
|
case DSP_BASE ... DSP_BASE + 5: {
|
|
dspreg_t *dregs;
|
|
|
|
if (!cpu_has_dsp) {
|
|
tmp = 0;
|
|
ret = -EIO;
|
|
goto out;
|
|
}
|
|
dregs = __get_dsp_regs(child);
|
|
tmp = (unsigned long) (dregs[addr - DSP_BASE]);
|
|
break;
|
|
}
|
|
case DSP_CONTROL:
|
|
if (!cpu_has_dsp) {
|
|
tmp = 0;
|
|
ret = -EIO;
|
|
goto out;
|
|
}
|
|
tmp = child->thread.dsp.dspcontrol;
|
|
break;
|
|
default:
|
|
tmp = 0;
|
|
ret = -EIO;
|
|
goto out;
|
|
}
|
|
ret = put_user(tmp, datalp);
|
|
break;
|
|
}
|
|
|
|
/* when I and D space are separate, this will have to be fixed. */
|
|
case PTRACE_POKETEXT: /* write the word at location addr. */
|
|
case PTRACE_POKEDATA:
|
|
ret = generic_ptrace_pokedata(child, addr, data);
|
|
break;
|
|
|
|
case PTRACE_POKEUSR: {
|
|
struct pt_regs *regs;
|
|
ret = 0;
|
|
regs = task_pt_regs(child);
|
|
|
|
switch (addr) {
|
|
case 0 ... 31:
|
|
regs->regs[addr] = data;
|
|
break;
|
|
case FPR_BASE ... FPR_BASE + 31: {
|
|
union fpureg *fregs = get_fpu_regs(child);
|
|
|
|
if (!tsk_used_math(child)) {
|
|
/* FP not yet used */
|
|
memset(&child->thread.fpu, ~0,
|
|
sizeof(child->thread.fpu));
|
|
child->thread.fpu.fcr31 = 0;
|
|
}
|
|
#ifdef CONFIG_32BIT
|
|
if (test_thread_flag(TIF_32BIT_FPREGS)) {
|
|
/*
|
|
* The odd registers are actually the high
|
|
* order bits of the values stored in the even
|
|
* registers - unless we're using r2k_switch.S.
|
|
*/
|
|
set_fpr32(&fregs[(addr & ~1) - FPR_BASE],
|
|
addr & 1, data);
|
|
break;
|
|
}
|
|
#endif
|
|
set_fpr64(&fregs[addr - FPR_BASE], 0, data);
|
|
break;
|
|
}
|
|
case PC:
|
|
regs->cp0_epc = data;
|
|
break;
|
|
case MMHI:
|
|
regs->hi = data;
|
|
break;
|
|
case MMLO:
|
|
regs->lo = data;
|
|
break;
|
|
#ifdef CONFIG_CPU_HAS_SMARTMIPS
|
|
case ACX:
|
|
regs->acx = data;
|
|
break;
|
|
#endif
|
|
case FPC_CSR:
|
|
child->thread.fpu.fcr31 = data;
|
|
break;
|
|
case DSP_BASE ... DSP_BASE + 5: {
|
|
dspreg_t *dregs;
|
|
|
|
if (!cpu_has_dsp) {
|
|
ret = -EIO;
|
|
break;
|
|
}
|
|
|
|
dregs = __get_dsp_regs(child);
|
|
dregs[addr - DSP_BASE] = data;
|
|
break;
|
|
}
|
|
case DSP_CONTROL:
|
|
if (!cpu_has_dsp) {
|
|
ret = -EIO;
|
|
break;
|
|
}
|
|
child->thread.dsp.dspcontrol = data;
|
|
break;
|
|
default:
|
|
/* The rest are not allowed. */
|
|
ret = -EIO;
|
|
break;
|
|
}
|
|
break;
|
|
}
|
|
|
|
case PTRACE_GETREGS:
|
|
ret = ptrace_getregs(child, datavp);
|
|
break;
|
|
|
|
case PTRACE_SETREGS:
|
|
ret = ptrace_setregs(child, datavp);
|
|
break;
|
|
|
|
case PTRACE_GETFPREGS:
|
|
ret = ptrace_getfpregs(child, datavp);
|
|
break;
|
|
|
|
case PTRACE_SETFPREGS:
|
|
ret = ptrace_setfpregs(child, datavp);
|
|
break;
|
|
|
|
case PTRACE_GET_THREAD_AREA:
|
|
ret = put_user(task_thread_info(child)->tp_value, datalp);
|
|
break;
|
|
|
|
case PTRACE_GET_WATCH_REGS:
|
|
ret = ptrace_get_watch_regs(child, addrp);
|
|
break;
|
|
|
|
case PTRACE_SET_WATCH_REGS:
|
|
ret = ptrace_set_watch_regs(child, addrp);
|
|
break;
|
|
|
|
default:
|
|
ret = ptrace_request(child, request, addr, data);
|
|
break;
|
|
}
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Notification of system call entry/exit
|
|
* - triggered by current->work.syscall_trace
|
|
*/
|
|
asmlinkage long syscall_trace_enter(struct pt_regs *regs, long syscall)
|
|
{
|
|
long ret = 0;
|
|
user_exit();
|
|
|
|
if (secure_computing(syscall) == -1)
|
|
return -1;
|
|
|
|
if (test_thread_flag(TIF_SYSCALL_TRACE) &&
|
|
tracehook_report_syscall_entry(regs))
|
|
ret = -1;
|
|
|
|
if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
|
|
trace_sys_enter(regs, regs->regs[2]);
|
|
|
|
audit_syscall_entry(syscall_get_arch(),
|
|
syscall,
|
|
regs->regs[4], regs->regs[5],
|
|
regs->regs[6], regs->regs[7]);
|
|
return syscall;
|
|
}
|
|
|
|
/*
|
|
* Notification of system call entry/exit
|
|
* - triggered by current->work.syscall_trace
|
|
*/
|
|
asmlinkage void syscall_trace_leave(struct pt_regs *regs)
|
|
{
|
|
/*
|
|
* We may come here right after calling schedule_user()
|
|
* or do_notify_resume(), in which case we can be in RCU
|
|
* user mode.
|
|
*/
|
|
user_exit();
|
|
|
|
audit_syscall_exit(regs);
|
|
|
|
if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
|
|
trace_sys_exit(regs, regs->regs[2]);
|
|
|
|
if (test_thread_flag(TIF_SYSCALL_TRACE))
|
|
tracehook_report_syscall_exit(regs, 0);
|
|
|
|
user_enter();
|
|
}
|