Palmer Dabbelt 8286d51a6c RISC-V: Comment on why {,cmp}xchg is ordered how it is ... This is another memory model FIXME. Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2017-11-28 14:03:29 -08:00
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configs	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00
include	RISC-V: Comment on why {,cmp}xchg is ordered how it is	2017-11-28 14:03:29 -08:00
kernel	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00
lib	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00
mm	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00
Kconfig	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00
Makefile	RISC-V: Build Infrastructure	2017-09-26 15:26:49 -07:00