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Since the QPACE (Chromodynamics Parallel Computing on the Cell Broadband Engine) platform doesn't use a iommu, doesn't have PCI devices and a MPIC much lesser setup and configurations are needed. So far all devices are detected as OF device. A notifier function is used to set the dma_ops for the of_platform bus. Further this patch splits the PPC_CELL_NATIVE into PPC_CELL_COMMON which are parts that are shared with the QPACE platform and the rest. Signed-off-by: Benjamin Krill <ben@codiert.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
51 lines
1.5 KiB
Makefile
51 lines
1.5 KiB
Makefile
obj-$(CONFIG_PPC_CELL_COMMON) += cbe_regs.o interrupt.o pervasive.o
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obj-$(CONFIG_PPC_CELL_NATIVE) += iommu.o setup.o spider-pic.o \
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pmu.o io-workarounds.o spider-pci.o
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obj-$(CONFIG_CBE_RAS) += ras.o
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obj-$(CONFIG_CBE_THERM) += cbe_thermal.o
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obj-$(CONFIG_CBE_CPUFREQ_PMI) += cbe_cpufreq_pmi.o
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obj-$(CONFIG_CBE_CPUFREQ) += cbe-cpufreq.o
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cbe-cpufreq-y += cbe_cpufreq_pervasive.o cbe_cpufreq.o
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obj-$(CONFIG_CBE_CPUFREQ_SPU_GOVERNOR) += cpufreq_spudemand.o
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obj-$(CONFIG_PPC_IBM_CELL_POWERBUTTON) += cbe_powerbutton.o
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ifeq ($(CONFIG_SMP),y)
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obj-$(CONFIG_PPC_CELL_NATIVE) += smp.o
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obj-$(CONFIG_PPC_CELL_QPACE) += smp.o
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endif
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# needed only when building loadable spufs.ko
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spu-priv1-$(CONFIG_PPC_CELL_COMMON) += spu_priv1_mmio.o
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spu-manage-$(CONFIG_PPC_CELL_COMMON) += spu_manage.o
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obj-$(CONFIG_SPU_BASE) += spu_callbacks.o spu_base.o \
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spu_notify.o \
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spu_syscalls.o spu_fault.o \
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$(spu-priv1-y) \
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$(spu-manage-y) \
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spufs/
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obj-$(CONFIG_PCI_MSI) += axon_msi.o
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# qpace setup
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obj-$(CONFIG_PPC_CELL_QPACE) += qpace_setup.o
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# celleb stuff
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ifeq ($(CONFIG_PPC_CELLEB),y)
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obj-y += celleb_setup.o \
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celleb_pci.o celleb_scc_epci.o \
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celleb_scc_pciex.o \
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celleb_scc_uhc.o \
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io-workarounds.o spider-pci.o \
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beat.o beat_htab.o beat_hvCall.o \
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beat_interrupt.o beat_iommu.o
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obj-$(CONFIG_SMP) += beat_smp.o
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obj-$(CONFIG_PPC_UDBG_BEAT) += beat_udbg.o
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obj-$(CONFIG_SERIAL_TXX9) += celleb_scc_sio.o
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obj-$(CONFIG_SPU_BASE) += beat_spu_priv1.o
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endif
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