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This patch adds binding information for IBM/AMCC/APM GPIO Controllers of the PowerPC 4XX series and compatible SoCs. The "PowerPC 405EP Embedded Processor Data Sheet" has the following to say about the GPIO controllers: " - Controller functions and GPIO registers are programmed and accessed via memory-mapped OPB bus master accesses - All GPIOs are pin-shared with other functions. DCRs control whether a particular pin that has GPIO capabilities acts as a GPIO or is used for another purpose. - Each GPIO outputs is separately programmable to emulate an open-drain driver (i.e. drives to zero, threestated if output bit is 1) " The ppc4xx_gpio.c driver is part of the platform/sysdev drivers in arch/powerpc/sysdev. Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Rob Herring <robh@kernel.org>
25 lines
799 B
Plaintext
25 lines
799 B
Plaintext
* IBM/AMCC/APM GPIO Controller for PowerPC 4XX series and compatible SoCs
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All GPIOs are pin-shared with other functions. DCRs control whether a
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particular pin that has GPIO capabilities acts as a GPIO or is used for
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another purpose. GPIO outputs are separately programmable to emulate
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an open-drain driver.
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Required properties:
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- compatible: must be "ibm,ppc4xx-gpio"
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- reg: address and length of the register set for the device
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- #gpio-cells: must be set to 2. The first cell is the pin number
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and the second cell is used to specify the gpio polarity:
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0 = active high
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1 = active low
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- gpio-controller: marks the device node as a gpio controller.
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Example:
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GPIO0: gpio@ef600b00 {
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compatible = "ibm,ppc4xx-gpio";
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reg = <0xef600b00 0x00000048>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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