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800149a77c
Add sign extension to the $badaddr before addressing the instruction page fault and instruction access fault to workaround the issue "cip-453". To avoid affecting the existing code sequence, this patch will creates two trampolines to add sign extension to the $badaddr. By the "alternative" mechanism, these two trampolines will replace the original exception handler of instruction page fault and instruction access fault in the excp_vect_table. In this case, only the specific SiFive CPU core jumps to the do_page_fault and do_trap_insn_fault through these two trampolines. Other CPUs are not affected. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
34 lines
1018 B
Plaintext
34 lines
1018 B
Plaintext
menu "CPU errata selection"
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config RISCV_ERRATA_ALTERNATIVE
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bool "RISC-V alternative scheme"
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default y
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help
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This Kconfig allows the kernel to automatically patch the
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errata required by the execution platform at run time. The
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code patching is performed once in the boot stages. It means
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that the overhead from this mechanism is just taken once.
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config ERRATA_SIFIVE
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bool "SiFive errata"
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depends on RISCV_ERRATA_ALTERNATIVE
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help
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All SiFive errata Kconfig depend on this Kconfig. Disabling
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this Kconfig will disable all SiFive errata. Please say "Y"
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here if your platform uses SiFive CPU cores.
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Otherwise, please say "N" here to avoid unnecessary overhead.
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config ERRATA_SIFIVE_CIP_453
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bool "Apply SiFive errata CIP-453"
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depends on ERRATA_SIFIVE
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default y
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help
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This will apply the SiFive CIP-453 errata to add sign extension
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to the $badaddr when exception type is instruction page fault
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and instruction access fault.
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If you don't know what to do here, say "Y".
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endmenu
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