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74415edb04
Drivers should notify rt2x00lib when they provide the IV/ICV data. This adds some flexibility to drivers which can't provide all information. * rt2500usb provides ICV inside the frame * rt2800pci doesn't provide IV/ICV * rt2800usb doesn't provide IV/ICV Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
594 lines
18 KiB
C
594 lines
18 KiB
C
/*
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Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
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<http://rt2x00.serialmonkey.com>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the
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Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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/*
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Module: rt2x00
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Abstract: rt2x00 queue datastructures and routines
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*/
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#ifndef RT2X00QUEUE_H
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#define RT2X00QUEUE_H
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#include <linux/prefetch.h>
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/**
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* DOC: Entrie frame size
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*
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* Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
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* for USB devices this restriction does not apply, but the value of
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* 2432 makes sense since it is big enough to contain the maximum fragment
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* size according to the ieee802.11 specs.
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*/
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#define DATA_FRAME_SIZE 2432
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#define MGMT_FRAME_SIZE 256
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/**
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* DOC: Number of entries per queue
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*
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* Under normal load without fragmentation 12 entries are sufficient
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* without the queue being filled up to the maximum. When using fragmentation
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* and the queue threshold code we need to add some additional margins to
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* make sure the queue will never (or only under extreme load) fill up
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* completely.
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* Since we don't use preallocated DMA having a large number of queue entries
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* will have only minimal impact on the memory requirements for the queue.
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*/
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#define RX_ENTRIES 24
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#define TX_ENTRIES 24
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#define BEACON_ENTRIES 1
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#define ATIM_ENTRIES 8
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/**
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* enum data_queue_qid: Queue identification
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*
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* @QID_AC_BE: AC BE queue
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* @QID_AC_BK: AC BK queue
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* @QID_AC_VI: AC VI queue
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* @QID_AC_VO: AC VO queue
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* @QID_HCCA: HCCA queue
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* @QID_MGMT: MGMT queue (prio queue)
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* @QID_RX: RX queue
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* @QID_OTHER: None of the above (don't use, only present for completeness)
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* @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
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* @QID_ATIM: Atim queue (value unspeficied, don't send it to device)
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*/
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enum data_queue_qid {
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QID_AC_BE = 0,
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QID_AC_BK = 1,
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QID_AC_VI = 2,
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QID_AC_VO = 3,
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QID_HCCA = 4,
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QID_MGMT = 13,
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QID_RX = 14,
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QID_OTHER = 15,
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QID_BEACON,
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QID_ATIM,
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};
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/**
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* enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
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*
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* @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
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* @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
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* @FRAME_DESC_IV_STRIPPED: Frame contained a IV/EIV provided by
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* mac80211 but was stripped for processing by the driver.
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*/
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enum skb_frame_desc_flags {
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SKBDESC_DMA_MAPPED_RX = 1 << 0,
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SKBDESC_DMA_MAPPED_TX = 1 << 1,
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FRAME_DESC_IV_STRIPPED = 1 << 2,
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};
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/**
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* struct skb_frame_desc: Descriptor information for the skb buffer
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*
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* This structure is placed over the driver_data array, this means that
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* this structure should not exceed the size of that array (40 bytes).
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*
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* @flags: Frame flags, see &enum skb_frame_desc_flags.
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* @desc_len: Length of the frame descriptor.
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* @tx_rate_idx: the index of the TX rate, used for TX status reporting
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* @tx_rate_flags: the TX rate flags, used for TX status reporting
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* @desc: Pointer to descriptor part of the frame.
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* Note that this pointer could point to something outside
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* of the scope of the skb->data pointer.
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* @iv: IV/EIV data used during encryption/decryption.
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* @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
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* @entry: The entry to which this sk buffer belongs.
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*/
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struct skb_frame_desc {
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u8 flags;
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u8 desc_len;
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u8 tx_rate_idx;
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u8 tx_rate_flags;
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void *desc;
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__le32 iv[2];
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dma_addr_t skb_dma;
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struct queue_entry *entry;
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};
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/**
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* get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
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* @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
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*/
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static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
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{
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BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
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IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
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return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
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}
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/**
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* enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
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*
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* @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
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* @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
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* @RXDONE_MY_BSS: Does this frame originate from device's BSS.
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* @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
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* @RXDONE_CRYPTO_ICV: Driver provided ICV data.
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*/
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enum rxdone_entry_desc_flags {
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RXDONE_SIGNAL_PLCP = 1 << 0,
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RXDONE_SIGNAL_BITRATE = 1 << 1,
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RXDONE_MY_BSS = 1 << 2,
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RXDONE_CRYPTO_IV = 1 << 3,
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RXDONE_CRYPTO_ICV = 1 << 4,
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};
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/**
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* struct rxdone_entry_desc: RX Entry descriptor
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*
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* Summary of information that has been read from the RX frame descriptor.
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*
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* @timestamp: RX Timestamp
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* @signal: Signal of the received frame.
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* @rssi: RSSI of the received frame.
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* @size: Data size of the received frame.
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* @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
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* @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
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* @cipher: Cipher type used during decryption.
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* @cipher_status: Decryption status.
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* @iv: IV/EIV data used during decryption.
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* @icv: ICV data used during decryption.
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*/
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struct rxdone_entry_desc {
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u64 timestamp;
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int signal;
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int rssi;
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int size;
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int flags;
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int dev_flags;
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u8 cipher;
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u8 cipher_status;
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__le32 iv[2];
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__le32 icv;
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};
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/**
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* enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
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*
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* @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
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* @TXDONE_SUCCESS: Frame was successfully send
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* @TXDONE_FAILURE: Frame was not successfully send
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* @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
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* frame transmission failed due to excessive retries.
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*/
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enum txdone_entry_desc_flags {
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TXDONE_UNKNOWN,
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TXDONE_SUCCESS,
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TXDONE_FAILURE,
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TXDONE_EXCESSIVE_RETRY,
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};
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/**
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* struct txdone_entry_desc: TX done entry descriptor
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*
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* Summary of information that has been read from the TX frame descriptor
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* after the device is done with transmission.
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*
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* @flags: TX done flags (See &enum txdone_entry_desc_flags).
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* @retry: Retry count.
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*/
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struct txdone_entry_desc {
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unsigned long flags;
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int retry;
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};
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/**
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* enum txentry_desc_flags: Status flags for TX entry descriptor
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*
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* @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
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* @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
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* @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate.
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* @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
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* @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
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* @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
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* @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
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* @ENTRY_TXD_BURST: This frame belongs to the same burst event.
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* @ENTRY_TXD_ACK: An ACK is required for this frame.
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* @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
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* @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
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* @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
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* @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
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* @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
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*/
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enum txentry_desc_flags {
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ENTRY_TXD_RTS_FRAME,
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ENTRY_TXD_CTS_FRAME,
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ENTRY_TXD_OFDM_RATE,
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ENTRY_TXD_GENERATE_SEQ,
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ENTRY_TXD_FIRST_FRAGMENT,
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ENTRY_TXD_MORE_FRAG,
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ENTRY_TXD_REQ_TIMESTAMP,
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ENTRY_TXD_BURST,
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ENTRY_TXD_ACK,
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ENTRY_TXD_RETRY_MODE,
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ENTRY_TXD_ENCRYPT,
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ENTRY_TXD_ENCRYPT_PAIRWISE,
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ENTRY_TXD_ENCRYPT_IV,
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ENTRY_TXD_ENCRYPT_MMIC,
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};
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/**
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* struct txentry_desc: TX Entry descriptor
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*
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* Summary of information for the frame descriptor before sending a TX frame.
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*
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* @flags: Descriptor flags (See &enum queue_entry_flags).
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* @queue: Queue identification (See &enum data_queue_qid).
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* @length_high: PLCP length high word.
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* @length_low: PLCP length low word.
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* @signal: PLCP signal.
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* @service: PLCP service.
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* @retry_limit: Max number of retries.
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* @aifs: AIFS value.
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* @ifs: IFS value.
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* @cw_min: cwmin value.
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* @cw_max: cwmax value.
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* @cipher: Cipher type used for encryption.
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* @key_idx: Key index used for encryption.
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* @iv_offset: Position where IV should be inserted by hardware.
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*/
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struct txentry_desc {
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unsigned long flags;
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enum data_queue_qid queue;
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u16 length_high;
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u16 length_low;
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u16 signal;
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u16 service;
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short retry_limit;
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short aifs;
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short ifs;
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short cw_min;
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short cw_max;
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enum cipher cipher;
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u16 key_idx;
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u16 iv_offset;
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};
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/**
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* enum queue_entry_flags: Status flags for queue entry
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*
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* @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
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* As long as this bit is set, this entry may only be touched
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* through the interface structure.
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* @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
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* transfer (either TX or RX depending on the queue). The entry should
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* only be touched after the device has signaled it is done with it.
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* @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data
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* encryption or decryption. The entry should only be touched after
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* the device has signaled it is done with it.
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* @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
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* for the signal to start sending.
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*/
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enum queue_entry_flags {
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ENTRY_BCN_ASSIGNED,
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ENTRY_OWNER_DEVICE_DATA,
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ENTRY_OWNER_DEVICE_CRYPTO,
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ENTRY_DATA_PENDING,
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};
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/**
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* struct queue_entry: Entry inside the &struct data_queue
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*
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* @flags: Entry flags, see &enum queue_entry_flags.
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* @queue: The data queue (&struct data_queue) to which this entry belongs.
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* @skb: The buffer which is currently being transmitted (for TX queue),
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* or used to directly recieve data in (for RX queue).
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* @entry_idx: The entry index number.
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* @priv_data: Private data belonging to this queue entry. The pointer
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* points to data specific to a particular driver and queue type.
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*/
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struct queue_entry {
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unsigned long flags;
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struct data_queue *queue;
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struct sk_buff *skb;
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unsigned int entry_idx;
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void *priv_data;
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};
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/**
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* enum queue_index: Queue index type
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*
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* @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
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* owned by the hardware then the queue is considered to be full.
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* @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
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* the hardware and for which we need to run the txdone handler. If this
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* entry is not owned by the hardware the queue is considered to be empty.
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* @Q_INDEX_CRYPTO: Index pointer to the next entry which encryption/decription
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* will be completed by the hardware next.
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* @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
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* of the index array.
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*/
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enum queue_index {
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Q_INDEX,
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Q_INDEX_DONE,
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Q_INDEX_CRYPTO,
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Q_INDEX_MAX,
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};
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/**
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* struct data_queue: Data queue
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*
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* @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
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* @entries: Base address of the &struct queue_entry which are
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* part of this queue.
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* @qid: The queue identification, see &enum data_queue_qid.
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* @lock: Spinlock to protect index handling. Whenever @index, @index_done or
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* @index_crypt needs to be changed this lock should be grabbed to prevent
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* index corruption due to concurrency.
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* @count: Number of frames handled in the queue.
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* @limit: Maximum number of entries in the queue.
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* @threshold: Minimum number of free entries before queue is kicked by force.
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* @length: Number of frames in queue.
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* @index: Index pointers to entry positions in the queue,
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* use &enum queue_index to get a specific index field.
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* @txop: maximum burst time.
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* @aifs: The aifs value for outgoing frames (field ignored in RX queue).
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* @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
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* @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
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* @data_size: Maximum data size for the frames in this queue.
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* @desc_size: Hardware descriptor size for the data in this queue.
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* @usb_endpoint: Device endpoint used for communication (USB only)
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* @usb_maxpacket: Max packet size for given endpoint (USB only)
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*/
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struct data_queue {
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struct rt2x00_dev *rt2x00dev;
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struct queue_entry *entries;
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enum data_queue_qid qid;
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spinlock_t lock;
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unsigned int count;
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unsigned short limit;
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unsigned short threshold;
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unsigned short length;
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unsigned short index[Q_INDEX_MAX];
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unsigned short txop;
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unsigned short aifs;
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unsigned short cw_min;
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unsigned short cw_max;
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unsigned short data_size;
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unsigned short desc_size;
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unsigned short usb_endpoint;
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unsigned short usb_maxpacket;
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};
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/**
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* struct data_queue_desc: Data queue description
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*
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* The information in this structure is used by drivers
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* to inform rt2x00lib about the creation of the data queue.
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*
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* @entry_num: Maximum number of entries for a queue.
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* @data_size: Maximum data size for the frames in this queue.
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* @desc_size: Hardware descriptor size for the data in this queue.
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* @priv_size: Size of per-queue_entry private data.
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*/
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struct data_queue_desc {
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unsigned short entry_num;
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unsigned short data_size;
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unsigned short desc_size;
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unsigned short priv_size;
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};
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/**
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* queue_end - Return pointer to the last queue (HELPER MACRO).
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* @__dev: Pointer to &struct rt2x00_dev
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*
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* Using the base rx pointer and the maximum number of available queues,
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* this macro will return the address of 1 position beyond the end of the
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* queues array.
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*/
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#define queue_end(__dev) \
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&(__dev)->rx[(__dev)->data_queues]
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/**
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* tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
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* @__dev: Pointer to &struct rt2x00_dev
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*
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* Using the base tx pointer and the maximum number of available TX
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* queues, this macro will return the address of 1 position beyond
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* the end of the TX queue array.
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*/
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#define tx_queue_end(__dev) \
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&(__dev)->tx[(__dev)->ops->tx_queues]
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/**
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* queue_next - Return pointer to next queue in list (HELPER MACRO).
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* @__queue: Current queue for which we need the next queue
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*
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* Using the current queue address we take the address directly
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* after the queue to take the next queue. Note that this macro
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* should be used carefully since it does not protect against
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* moving past the end of the list. (See macros &queue_end and
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* &tx_queue_end for determining the end of the queue).
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*/
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#define queue_next(__queue) \
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&(__queue)[1]
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/**
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* queue_loop - Loop through the queues within a specific range (HELPER MACRO).
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* @__entry: Pointer where the current queue entry will be stored in.
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* @__start: Start queue pointer.
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* @__end: End queue pointer.
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*
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* This macro will loop through all queues between &__start and &__end.
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*/
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#define queue_loop(__entry, __start, __end) \
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for ((__entry) = (__start); \
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prefetch(queue_next(__entry)), (__entry) != (__end);\
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(__entry) = queue_next(__entry))
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/**
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* queue_for_each - Loop through all queues
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* @__dev: Pointer to &struct rt2x00_dev
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* @__entry: Pointer where the current queue entry will be stored in.
|
|
*
|
|
* This macro will loop through all available queues.
|
|
*/
|
|
#define queue_for_each(__dev, __entry) \
|
|
queue_loop(__entry, (__dev)->rx, queue_end(__dev))
|
|
|
|
/**
|
|
* tx_queue_for_each - Loop through the TX queues
|
|
* @__dev: Pointer to &struct rt2x00_dev
|
|
* @__entry: Pointer where the current queue entry will be stored in.
|
|
*
|
|
* This macro will loop through all TX related queues excluding
|
|
* the Beacon and Atim queues.
|
|
*/
|
|
#define tx_queue_for_each(__dev, __entry) \
|
|
queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
|
|
|
|
/**
|
|
* txall_queue_for_each - Loop through all TX related queues
|
|
* @__dev: Pointer to &struct rt2x00_dev
|
|
* @__entry: Pointer where the current queue entry will be stored in.
|
|
*
|
|
* This macro will loop through all TX related queues including
|
|
* the Beacon and Atim queues.
|
|
*/
|
|
#define txall_queue_for_each(__dev, __entry) \
|
|
queue_loop(__entry, (__dev)->tx, queue_end(__dev))
|
|
|
|
/**
|
|
* rt2x00queue_empty - Check if the queue is empty.
|
|
* @queue: Queue to check if empty.
|
|
*/
|
|
static inline int rt2x00queue_empty(struct data_queue *queue)
|
|
{
|
|
return queue->length == 0;
|
|
}
|
|
|
|
/**
|
|
* rt2x00queue_full - Check if the queue is full.
|
|
* @queue: Queue to check if full.
|
|
*/
|
|
static inline int rt2x00queue_full(struct data_queue *queue)
|
|
{
|
|
return queue->length == queue->limit;
|
|
}
|
|
|
|
/**
|
|
* rt2x00queue_free - Check the number of available entries in queue.
|
|
* @queue: Queue to check.
|
|
*/
|
|
static inline int rt2x00queue_available(struct data_queue *queue)
|
|
{
|
|
return queue->limit - queue->length;
|
|
}
|
|
|
|
/**
|
|
* rt2x00queue_threshold - Check if the queue is below threshold
|
|
* @queue: Queue to check.
|
|
*/
|
|
static inline int rt2x00queue_threshold(struct data_queue *queue)
|
|
{
|
|
return rt2x00queue_available(queue) < queue->threshold;
|
|
}
|
|
|
|
/**
|
|
* _rt2x00_desc_read - Read a word from the hardware descriptor.
|
|
* @desc: Base descriptor address
|
|
* @word: Word index from where the descriptor should be read.
|
|
* @value: Address where the descriptor value should be written into.
|
|
*/
|
|
static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
|
|
{
|
|
*value = desc[word];
|
|
}
|
|
|
|
/**
|
|
* rt2x00_desc_read - Read a word from the hardware descriptor, this
|
|
* function will take care of the byte ordering.
|
|
* @desc: Base descriptor address
|
|
* @word: Word index from where the descriptor should be read.
|
|
* @value: Address where the descriptor value should be written into.
|
|
*/
|
|
static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
|
|
{
|
|
__le32 tmp;
|
|
_rt2x00_desc_read(desc, word, &tmp);
|
|
*value = le32_to_cpu(tmp);
|
|
}
|
|
|
|
/**
|
|
* rt2x00_desc_write - write a word to the hardware descriptor, this
|
|
* function will take care of the byte ordering.
|
|
* @desc: Base descriptor address
|
|
* @word: Word index from where the descriptor should be written.
|
|
* @value: Value that should be written into the descriptor.
|
|
*/
|
|
static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
|
|
{
|
|
desc[word] = value;
|
|
}
|
|
|
|
/**
|
|
* rt2x00_desc_write - write a word to the hardware descriptor.
|
|
* @desc: Base descriptor address
|
|
* @word: Word index from where the descriptor should be written.
|
|
* @value: Value that should be written into the descriptor.
|
|
*/
|
|
static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
|
|
{
|
|
_rt2x00_desc_write(desc, word, cpu_to_le32(value));
|
|
}
|
|
|
|
#endif /* RT2X00QUEUE_H */
|