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7f6b2e7b1f
Make sure IFLUSH is not the last instruction in the hardware loop to avoid infinite core stall. The dcache/icache function that only gets used in writeback mode was putting IFLUSH as the last instruction in the hardware loop ... we know from design that this may often lead to inifite core stalling, so switch the FLUSH/IFLUSH order. Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> |
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.. | ||
arch_checks.c | ||
cache.S | ||
cpufreq.c | ||
dpmc_modes.S | ||
dpmc.c | ||
entry.S | ||
head.S | ||
interrupt.S | ||
ints-priority.c | ||
irqpanic.c | ||
lock.S | ||
Makefile | ||
pm.c |